After IncompatiblePciDeviceSupportDxe, this is another small driver /
protocol implementation that tweaks the behavior of the PCI bus driver in
edk2.
The protocol is specified in the Platform Init Spec v1.4a, Volume 5,
Chapter 12.6 "PCI Hot Plug PCI Initialization Protocol". This
implementation steers the PCI bus driver to reserve the following
resources ("padding") for each PCI bus, in addition to the BARs of the
devices on that PCI bus:
- 2MB of 64-bit non-prefetchable MMIO aperture,
- 512B of IO port space.
The goal is to reserve room for devices hot-plugged at runtime even if the
bridge receiving the device is empty at boot time.
The 2MB MMIO size is inspired by SeaBIOS. The 512B IO port size is
actually only 1/8th of the PCI spec mandated reservation, but the
specified size of 4096 has proved wasteful (given the limited size of our
IO port space -- see commit bba734ab4c
). Especially on Q35, where every
PCIe root port and downstream port qualifies as a separate bridge (capable
of accepting a single device).
Test results for this patch:
- regardless of our request for 64-bit MMIO reservation, it is downgraded
to 32-bit,
- although we request 512B alignment for the IO port space reservation,
the next upstream bridge rounds it up to 4096B.
Cc: "Johnson, Brian J." <bjohnson@sgi.com>
Cc: Alex Williamson <alex.williamson@redhat.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Marcel Apfelbaum <marcel@redhat.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Suggested-by: Andrew Fish <afish@apple.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ruiyu Ni <Ruiyu.ni@intel.com>
527 lines
18 KiB
Plaintext
527 lines
18 KiB
Plaintext
## @file
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# Open Virtual Machine Firmware: FDF
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#
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# Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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##
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################################################################################
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[Defines]
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!include OvmfPkg.fdf.inc
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#
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# Build the variable store and the firmware code as one unified flash device
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# image.
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#
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[FD.OVMF]
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BaseAddress = $(FW_BASE_ADDRESS)
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Size = $(FW_SIZE)
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ErasePolarity = 1
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BlockSize = $(BLOCK_SIZE)
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NumBlocks = $(FW_BLOCKS)
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!include VarStore.fdf.inc
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$(VARS_SIZE)|$(FVMAIN_SIZE)
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FV = FVMAIN_COMPACT
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$(SECFV_OFFSET)|$(SECFV_SIZE)
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FV = SECFV
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#
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# Build the variable store and the firmware code as separate flash device
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# images.
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#
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[FD.OVMF_VARS]
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BaseAddress = $(FW_BASE_ADDRESS)
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Size = $(VARS_SIZE)
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ErasePolarity = 1
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BlockSize = $(BLOCK_SIZE)
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NumBlocks = $(VARS_BLOCKS)
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!include VarStore.fdf.inc
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[FD.OVMF_CODE]
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BaseAddress = $(CODE_BASE_ADDRESS)
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Size = $(CODE_SIZE)
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ErasePolarity = 1
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BlockSize = $(BLOCK_SIZE)
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NumBlocks = $(CODE_BLOCKS)
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0x00000000|$(FVMAIN_SIZE)
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FV = FVMAIN_COMPACT
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$(FVMAIN_SIZE)|$(SECFV_SIZE)
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FV = SECFV
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################################################################################
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[FD.MEMFD]
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BaseAddress = $(MEMFD_BASE_ADDRESS)
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Size = 0xB00000
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ErasePolarity = 1
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BlockSize = 0x10000
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NumBlocks = 0xB0
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0x000000|0x006000
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesSize
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0x006000|0x001000
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageSize
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0x007000|0x001000
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gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress|gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize
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0x010000|0x008000
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize
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0x018000|0x008000
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gUefiOvmfPkgTokenSpaceGuid.PcdS3AcpiReservedMemoryBase|gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdS3AcpiReservedMemorySize
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0x020000|0x0E0000
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize
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FV = PEIFV
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0x100000|0xA00000
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize
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FV = DXEFV
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################################################################################
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[FV.SECFV]
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FvNameGuid = 763BED0D-DE9F-48F5-81F1-3E90E1B1A015
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BlockSize = 0x1000
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FvAlignment = 16
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ERASE_POLARITY = 1
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MEMORY_MAPPED = TRUE
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STICKY_WRITE = TRUE
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LOCK_CAP = TRUE
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LOCK_STATUS = TRUE
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WRITE_DISABLED_CAP = TRUE
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WRITE_ENABLED_CAP = TRUE
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WRITE_STATUS = TRUE
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WRITE_LOCK_CAP = TRUE
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WRITE_LOCK_STATUS = TRUE
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READ_DISABLED_CAP = TRUE
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READ_ENABLED_CAP = TRUE
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READ_STATUS = TRUE
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READ_LOCK_CAP = TRUE
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READ_LOCK_STATUS = TRUE
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#
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# SEC Phase modules
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#
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# The code in this FV handles the initial firmware startup, and
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# decompresses the PEI and DXE FVs which handles the rest of the boot sequence.
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#
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INF OvmfPkg/Sec/SecMain.inf
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INF RuleOverride=RESET_VECTOR OvmfPkg/ResetVector/ResetVector.inf
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################################################################################
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[FV.PEIFV]
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FvNameGuid = 6938079B-B503-4E3D-9D24-B28337A25806
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BlockSize = 0x10000
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FvAlignment = 16
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ERASE_POLARITY = 1
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MEMORY_MAPPED = TRUE
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STICKY_WRITE = TRUE
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LOCK_CAP = TRUE
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LOCK_STATUS = TRUE
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WRITE_DISABLED_CAP = TRUE
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WRITE_ENABLED_CAP = TRUE
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WRITE_STATUS = TRUE
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WRITE_LOCK_CAP = TRUE
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WRITE_LOCK_STATUS = TRUE
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READ_DISABLED_CAP = TRUE
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READ_ENABLED_CAP = TRUE
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READ_STATUS = TRUE
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READ_LOCK_CAP = TRUE
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READ_LOCK_STATUS = TRUE
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APRIORI PEI {
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INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
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}
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#
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# PEI Phase modules
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#
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INF MdeModulePkg/Core/Pei/PeiMain.inf
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INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
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INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
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INF OvmfPkg/PlatformPei/PlatformPei.inf
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INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
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INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
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!if $(SMM_REQUIRE) == TRUE
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INF OvmfPkg/SmmAccess/SmmAccessPei.inf
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!endif
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################################################################################
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[FV.DXEFV]
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FvNameGuid = 7CB8BDC9-F8EB-4F34-AAEA-3EE4AF6516A1
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BlockSize = 0x10000
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FvAlignment = 16
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ERASE_POLARITY = 1
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MEMORY_MAPPED = TRUE
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STICKY_WRITE = TRUE
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LOCK_CAP = TRUE
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LOCK_STATUS = TRUE
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WRITE_DISABLED_CAP = TRUE
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WRITE_ENABLED_CAP = TRUE
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WRITE_STATUS = TRUE
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WRITE_LOCK_CAP = TRUE
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WRITE_LOCK_STATUS = TRUE
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READ_DISABLED_CAP = TRUE
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READ_ENABLED_CAP = TRUE
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READ_STATUS = TRUE
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READ_LOCK_CAP = TRUE
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READ_LOCK_STATUS = TRUE
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APRIORI DXE {
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INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
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INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
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!if $(SMM_REQUIRE) == FALSE
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INF OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf
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!endif
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}
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#
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# DXE Phase modules
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#
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INF MdeModulePkg/Core/Dxe/DxeMain.inf
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INF IntelFrameworkModulePkg/Universal/StatusCode/RuntimeDxe/StatusCodeRuntimeDxe.inf
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INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
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INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
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INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
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INF MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
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INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
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INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
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INF UefiCpuPkg/CpuDxe/CpuDxe.inf
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INF PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
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INF OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
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INF OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
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INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
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INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
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INF PcAtChipsetPkg/KbcResetDxe/Reset.inf
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INF MdeModulePkg/Universal/Metronome/Metronome.inf
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INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
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INF OvmfPkg/BlockMmioToBlockIoDxe/BlockIo.inf
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INF OvmfPkg/VirtioPciDeviceDxe/VirtioPciDeviceDxe.inf
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INF OvmfPkg/Virtio10Dxe/Virtio10.inf
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INF OvmfPkg/VirtioBlkDxe/VirtioBlk.inf
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INF OvmfPkg/VirtioScsiDxe/VirtioScsi.inf
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INF OvmfPkg/VirtioRngDxe/VirtioRng.inf
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INF OvmfPkg/XenIoPciDxe/XenIoPciDxe.inf
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INF OvmfPkg/XenBusDxe/XenBusDxe.inf
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INF OvmfPkg/XenPvBlkDxe/XenPvBlkDxe.inf
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!if $(SECURE_BOOT_ENABLE) == TRUE
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INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
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!endif
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INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
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INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
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INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
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INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
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INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
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INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
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INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
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INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf
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INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
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INF MdeModulePkg/Application/UiApp/UiApp.inf
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INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
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INF MdeModulePkg/Universal/PrintDxe/PrintDxe.inf
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INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
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INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
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INF MdeModulePkg/Universal/Disk/RamDiskDxe/RamDiskDxe.inf
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INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
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INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
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INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
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INF OvmfPkg/SataControllerDxe/SataControllerDxe.inf
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INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
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INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
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INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
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INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
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INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
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INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
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INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
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INF PcAtChipsetPkg/IsaAcpiDxe/IsaAcpi.inf
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INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf
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!ifndef $(SOURCE_DEBUG_ENABLE)
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INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf
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!endif
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INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf
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INF IntelFrameworkModulePkg/Bus/Isa/IsaFloppyDxe/IsaFloppyDxe.inf
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INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
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INF OvmfPkg/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
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INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
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INF OvmfPkg/AcpiPlatformDxe/AcpiPlatformDxe.inf
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INF RuleOverride=ACPITABLE OvmfPkg/AcpiTables/AcpiTables.inf
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INF MdeModulePkg/Universal/Acpi/S3SaveStateDxe/S3SaveStateDxe.inf
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INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
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INF FatPkg/EnhancedFatDxe/Fat.inf
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!ifndef $(USE_OLD_SHELL)
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INF ShellPkg/Application/Shell/Shell.inf
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!else
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INF RuleOverride = BINARY EdkShellBinPkg/FullShell/FullShell.inf
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!endif
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FILE FREEFORM = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLogoFile) {
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SECTION RAW = MdeModulePkg/Logo/Logo.bmp
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}
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#
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# Network modules
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#
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!if $(E1000_ENABLE)
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FILE DRIVER = 5D695E11-9B3F-4b83-B25F-4A8D5D69BE07 {
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SECTION PE32 = Intel3.5/EFIX64/E3507X2.EFI
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}
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!endif
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INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
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INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
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INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
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INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
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INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
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INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
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INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
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INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
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INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
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!if $(NETWORK_IP6_ENABLE) == TRUE
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INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf
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INF NetworkPkg/TcpDxe/TcpDxe.inf
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INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf
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INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf
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INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf
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INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf
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!if $(SECURE_BOOT_ENABLE) == TRUE
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INF NetworkPkg/IScsiDxe/IScsiDxe.inf
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!else
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INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf
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!endif
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!else
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INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
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INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
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INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf
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!endif
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!if $(HTTP_BOOT_ENABLE) == TRUE
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INF NetworkPkg/DnsDxe/DnsDxe.inf
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INF NetworkPkg/HttpUtilitiesDxe/HttpUtilitiesDxe.inf
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INF NetworkPkg/HttpDxe/HttpDxe.inf
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INF NetworkPkg/HttpBootDxe/HttpBootDxe.inf
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!endif
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INF OvmfPkg/VirtioNetDxe/VirtioNet.inf
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#
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# Usb Support
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#
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INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
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INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
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INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
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INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
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INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
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INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
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!ifdef $(CSM_ENABLE)
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INF IntelFrameworkModulePkg/Csm/BiosThunk/VideoDxe/VideoDxe.inf
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INF IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosDxe.inf
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INF RuleOverride=CSM OvmfPkg/Csm/Csm16/Csm16.inf
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!endif
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INF OvmfPkg/QemuVideoDxe/QemuVideoDxe.inf
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INF OvmfPkg/PlatformDxe/Platform.inf
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!if $(SMM_REQUIRE) == TRUE
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INF OvmfPkg/SmmAccess/SmmAccess2Dxe.inf
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INF OvmfPkg/SmmControl2Dxe/SmmControl2Dxe.inf
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INF UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf
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INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf
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INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf
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INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf
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INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
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INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
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#
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# Variable driver stack (SMM)
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#
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INF OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesSmm.inf
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INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
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|
INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
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INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
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!else
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#
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# Variable driver stack (non-SMM)
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#
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INF OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf
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INF OvmfPkg/EmuVariableFvbRuntimeDxe/Fvb.inf
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INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
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INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
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!endif
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################################################################################
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[FV.FVMAIN_COMPACT]
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FvNameGuid = 48DB5E17-707C-472D-91CD-1613E7EF51B0
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FvAlignment = 16
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ERASE_POLARITY = 1
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MEMORY_MAPPED = TRUE
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STICKY_WRITE = TRUE
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LOCK_CAP = TRUE
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LOCK_STATUS = TRUE
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WRITE_DISABLED_CAP = TRUE
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WRITE_ENABLED_CAP = TRUE
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WRITE_STATUS = TRUE
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WRITE_LOCK_CAP = TRUE
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WRITE_LOCK_STATUS = TRUE
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READ_DISABLED_CAP = TRUE
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READ_ENABLED_CAP = TRUE
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READ_STATUS = TRUE
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READ_LOCK_CAP = TRUE
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READ_LOCK_STATUS = TRUE
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FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
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SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
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#
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# These firmware volumes will have files placed in them uncompressed,
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# and then both firmware volumes will be compressed in a single
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# compression operation in order to achieve better overall compression.
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#
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SECTION FV_IMAGE = PEIFV
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SECTION FV_IMAGE = DXEFV
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}
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}
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!include DecomprScratchEnd.fdf.inc
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################################################################################
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[Rule.Common.SEC]
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FILE SEC = $(NAMED_GUID) {
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PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
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UI STRING ="$(MODULE_NAME)" Optional
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VERSION STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
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}
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[Rule.Common.PEI_CORE]
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FILE PEI_CORE = $(NAMED_GUID) {
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PE32 PE32 Align=Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
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UI STRING ="$(MODULE_NAME)" Optional
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VERSION STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
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}
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[Rule.Common.PEIM]
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FILE PEIM = $(NAMED_GUID) {
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PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
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PE32 PE32 Align=Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
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UI STRING="$(MODULE_NAME)" Optional
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VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
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}
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[Rule.Common.DXE_CORE]
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FILE DXE_CORE = $(NAMED_GUID) {
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PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
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UI STRING="$(MODULE_NAME)" Optional
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VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
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}
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[Rule.Common.DXE_DRIVER]
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FILE DRIVER = $(NAMED_GUID) {
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DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
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PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
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UI STRING="$(MODULE_NAME)" Optional
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VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
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RAW ACPI Optional |.acpi
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RAW ASL Optional |.aml
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}
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[Rule.Common.DXE_RUNTIME_DRIVER]
|
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FILE DRIVER = $(NAMED_GUID) {
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DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
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PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
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UI STRING="$(MODULE_NAME)" Optional
|
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VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
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}
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[Rule.Common.UEFI_DRIVER]
|
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FILE DRIVER = $(NAMED_GUID) {
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DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
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PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
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UI STRING="$(MODULE_NAME)" Optional
|
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VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
|
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}
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[Rule.Common.UEFI_DRIVER.BINARY]
|
|
FILE DRIVER = $(NAMED_GUID) {
|
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DXE_DEPEX DXE_DEPEX Optional |.depex
|
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PE32 PE32 |.efi
|
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UI STRING="$(MODULE_NAME)" Optional
|
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VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
|
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}
|
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|
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[Rule.Common.UEFI_APPLICATION]
|
|
FILE APPLICATION = $(NAMED_GUID) {
|
|
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
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UI STRING="$(MODULE_NAME)" Optional
|
|
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
|
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}
|
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|
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[Rule.Common.UEFI_APPLICATION.BINARY]
|
|
FILE APPLICATION = $(NAMED_GUID) {
|
|
PE32 PE32 |.efi
|
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UI STRING="$(MODULE_NAME)" Optional
|
|
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
|
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}
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[Rule.Common.USER_DEFINED.ACPITABLE]
|
|
FILE FREEFORM = $(NAMED_GUID) {
|
|
RAW ACPI |.acpi
|
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RAW ASL |.aml
|
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}
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[Rule.Common.USER_DEFINED.CSM]
|
|
FILE FREEFORM = $(NAMED_GUID) {
|
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RAW BIN |.bin
|
|
}
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[Rule.Common.SEC.RESET_VECTOR]
|
|
FILE RAW = $(NAMED_GUID) {
|
|
RAW BIN Align = 16 |.bin
|
|
}
|
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[Rule.Common.SMM_CORE]
|
|
FILE SMM_CORE = $(NAMED_GUID) {
|
|
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
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UI STRING="$(MODULE_NAME)" Optional
|
|
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
|
|
}
|
|
|
|
[Rule.Common.DXE_SMM_DRIVER]
|
|
FILE SMM = $(NAMED_GUID) {
|
|
SMM_DEPEX SMM_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
|
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
|
UI STRING="$(MODULE_NAME)" Optional
|
|
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
|
|
}
|