7ede80607b
https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Qian Yi <yi.qian@intel.com> Reviewed-by: Zailing Sun <zailiang.sun@intel.com>
152 lines
4.1 KiB
Plaintext
152 lines
4.1 KiB
Plaintext
/**************************************************************************;
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;* *;
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;* *;
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;* Intel Corporation - ACPI Reference Code for the Baytrail *;
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;* Family of Customer Reference Boards. *;
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;* *;
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;* *;
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;* Copyright (c) 2012 - 2014, Intel Corporation. All rights reserved *;
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;
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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;* *;
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;* *;
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;**************************************************************************/
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Device(FWHD) // Firmware Hub Device
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{
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Name(_HID,EISAID("INT0800"))
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Name(_CRS,ResourceTemplate()
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{
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Memory32Fixed(ReadOnly,0xFF000000,0x1000000)
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})
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}
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Device(IPIC) // 8259 PIC
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{
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Name(_HID,EISAID("PNP0000"))
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Name(_CRS,ResourceTemplate()
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{
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IO(Decode16,0x20,0x20,0x01,0x02)
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IO(Decode16,0x24,0x24,0x01,0x02)
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IO(Decode16,0x28,0x28,0x01,0x02)
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IO(Decode16,0x2C,0x2C,0x01,0x02)
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IO(Decode16,0x30,0x30,0x01,0x02)
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IO(Decode16,0x34,0x34,0x01,0x02)
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IO(Decode16,0x38,0x38,0x01,0x02)
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IO(Decode16,0x3C,0x3C,0x01,0x02)
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IO(Decode16,0xA0,0xA0,0x01,0x02)
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IO(Decode16,0xA4,0xA4,0x01,0x02)
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IO(Decode16,0xA8,0xA8,0x01,0x02)
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IO(Decode16,0xAC,0xAC,0x01,0x02)
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IO(Decode16,0xB0,0xB0,0x01,0x02)
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IO(Decode16,0xB4,0xB4,0x01,0x02)
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IO(Decode16,0xB8,0xB8,0x01,0x02)
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IO(Decode16,0xBC,0xBC,0x01,0x02)
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IO(Decode16,0x4D0,0x4D0,0x01,0x02)
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IRQNoFlags() {2}
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})
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}
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Device(LDRC) // LPC Device Resource Consumption
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{
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Name(_HID,EISAID("PNP0C02"))
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Name(_UID,2)
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Name(_CRS,ResourceTemplate()
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{
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IO(Decode16,0x4E,0x4E,0x1,0x02) // LPC Slot Access.
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IO(Decode16,0x61,0x61,0x1,0x1) // NMI Status.
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IO(Decode16,0x63,0x63,0x1,0x1) // Processor I/F.
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IO(Decode16,0x65,0x65,0x1,0x1) // Processor I/F.
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IO(Decode16,0x67,0x67,0x1,0x1) // Processor I/F.
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IO(Decode16,0x70,0x70,0x1,0x1) // NMI Enable.
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IO(Decode16,0x80,0x80,0x1,0x10) // Postcode.
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IO(Decode16,0x92,0x92,0x1,0x1) // Processor I/F.
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IO(Decode16,0xB2,0xB2,0x01,0x02) // Software SMI.
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IO(Decode16,0x680,0x680,0x1,0x20) // 32 Byte I/O.
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IO(Decode16,0x400,0x400,0x1,0x80) // ACPI Base.
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IO(Decode16,0x500,0x500,0x1,0xFF) // GPIO Base.
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})
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}
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Device(TIMR) // 8254 Timer
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{
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Name(_HID,EISAID("PNP0100"))
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Name(_CRS,ResourceTemplate()
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{
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IO(Decode16,0x40,0x40,0x01,0x04)
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IO(Decode16,0x50,0x50,0x10,0x04)
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IRQNoFlags() {0}
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})
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}
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Device(IUR3) // Internal UART
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{
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Name(_HID, EISAID("PNP0501"))
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Name(_UID,1)
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// Status Method for internal UART
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Method(_STA,0,Serialized)
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{
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// Only report resources to the OS if internal UART is
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// not set to Disabled in BIOS Setup.
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If(LEqual(USEL,0))
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{
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If(LEqual(PU1E,1))
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{
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Store(1,UI3E) // Enable IRQ3 for UART
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Store(1,UI4E) // Enable IRQ4 for UART
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Store(1,C1EN) // Enable UART
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Return(0x000F)
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}
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}
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Return(0x0000)
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}
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// Disable Method for internal UART
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Method(_DIS,0,Serialized)
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{
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Store(0,UI3E)
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Store(0,UI4E)
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Store(0,C1EN)
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}
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// Current Resource Setting Method for internal UART
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Method(_CRS,0,Serialized)
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{
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// Create the Buffer that stores the Resources to
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// be returned.
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Name(BUF0,ResourceTemplate()
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{
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IO(Decode16,0x03F8,0x03F8,0x01,0x08)
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IRQNoFlags() {3}
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})
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Name(BUF1,ResourceTemplate()
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{
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IO(Decode16,0x03F8,0x03F8,0x01,0x08)
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IRQNoFlags() {4}
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})
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If (LLessEqual(SRID, 0x04))
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{
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Return(BUF0)
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} Else
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{
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Return(BUF1)
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}
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}
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}
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