https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
		
			
				
	
	
		
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			ArmAsm
		
	
	
	
	
	
| #------------------------------------------------------------------------------
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| #
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| # GetInterruptState() function for AArch64
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| #
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| # Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
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| # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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| # Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
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| # SPDX-License-Identifier: BSD-2-Clause-Patent
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| #
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| #------------------------------------------------------------------------------
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| 
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| .text
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| .p2align 2
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| GCC_ASM_EXPORT(GetInterruptState)
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| 
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| .set DAIF_RD_IRQ_BIT,   (1 << 7)
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| 
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| #/**
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| #  Retrieves the current CPU interrupt state.
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| #
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| #  Returns TRUE is interrupts are currently enabled. Otherwise
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| #  returns FALSE.
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| #
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| #  @retval TRUE  CPU interrupts are enabled.
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| #  @retval FALSE CPU interrupts are disabled.
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| #
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| #**/
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| #
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| #BOOLEAN
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| #EFIAPI
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| #GetInterruptState (
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| #  VOID
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| # );
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| #
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| ASM_PFX(GetInterruptState):
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|     mrs    x0, daif
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|     tst    x0, #DAIF_RD_IRQ_BIT   // Check IRQ mask; set Z=1 if clear/unmasked
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|     cset   w0, eq                 // if Z=1 (eq) return 1, else 0
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|     ret
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