9344f09215
https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
55 lines
1.2 KiB
NASM
55 lines
1.2 KiB
NASM
;------------------------------------------------------------------------------
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;
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; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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; Module Name:
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;
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; SetMem64.nasm
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;
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; Abstract:
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;
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; SetMem64 function
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;
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; Notes:
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;
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;------------------------------------------------------------------------------
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SECTION .text
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;------------------------------------------------------------------------------
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; VOID *
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; EFIAPI
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; InternalMemSetMem64 (
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; IN VOID *Buffer,
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; IN UINTN Count,
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; IN UINT64 Value
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; )
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;------------------------------------------------------------------------------
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global ASM_PFX(InternalMemSetMem64)
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ASM_PFX(InternalMemSetMem64):
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mov eax, [esp + 4] ; eax <- Buffer
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mov ecx, [esp + 8] ; ecx <- Count
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test al, 8
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mov edx, eax
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movq xmm0, qword [esp + 12]
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jz .0
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movq qword [edx], xmm0
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add edx, 8
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dec ecx
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.0:
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shr ecx, 1
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jz @SetQwords
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movlhps xmm0, xmm0
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.1:
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movntdq [edx], xmm0
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lea edx, [edx + 16]
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loop .1
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mfence
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@SetQwords:
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jnc .2
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movq qword [edx], xmm0
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.2:
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ret
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