826a66d4c0
PCI22/PCI23/PCI30 spec were reviewed and the missing definitions were added to accordingly Pci22.h/Pci23.h/Pci30.h. All other class code definitions that are not defined in PCI Local Bus specification but in PCI Code and ID Assignment specification are defined in PciCodeId.h. Signed-off-by: Ruiyu Ni<ruiyu.ni@intel.com> Reviewed-by: Liming Gao<liming.gao@intel.com> Reviewed-by: Hot Tian<hot.tian@intel.com> Reviewed-by: Elvin Li<elvin.li@intel.com> Reviewed-by: Feng Tian<feng.tian@intel.com> Reviewed-by: Jiewen Yao<jiewen.yao@intel.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13919 6f19259b-4bc3-4df7-8a09-765794883524
80 lines
2.1 KiB
C
80 lines
2.1 KiB
C
/** @file
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Support for PCI 3.0 standard.
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Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef __PCI30_H__
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#define __PCI30_H__
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#include <IndustryStandard/Pci23.h>
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///
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/// PCI_CLASS_MASS_STORAGE, Base Class 01h.
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///
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///@{
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#define PCI_CLASS_MASS_STORAGE_SATADPA 0x06
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#define PCI_IF_MASS_STORAGE_SATA 0x00
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#define PCI_IF_MASS_STORAGE_AHCI 0x01
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///@}
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///
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/// PCI_CLASS_WIRELESS, Base Class 0Dh.
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///
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///@{
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#define PCI_SUBCLASS_ETHERNET_80211A 0x20
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#define PCI_SUBCLASS_ETHERNET_80211B 0x21
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///@}
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/**
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Macro that checks whether device is a SATA controller.
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@param _p Specified device.
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@retval TRUE Device is a SATA controller.
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@retval FALSE Device is not a SATA controller.
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**/
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#define IS_PCI_SATADPA(_p) IS_CLASS2 (_p, PCI_CLASS_MASS_STORAGE, PCI_CLASS_MASS_STORAGE_SATADPA)
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///
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/// PCI Capability List IDs and records
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///
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#define EFI_PCI_CAPABILITY_ID_PCIEXP 0x10
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#pragma pack(1)
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///
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/// PCI Data Structure Format
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/// Section 5.1.2, PCI Firmware Specification, Revision 3.0
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///
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typedef struct {
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UINT32 Signature; ///< "PCIR"
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UINT16 VendorId;
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UINT16 DeviceId;
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UINT16 DeviceListOffset;
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UINT16 Length;
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UINT8 Revision;
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UINT8 ClassCode[3];
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UINT16 ImageLength;
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UINT16 CodeRevision;
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UINT8 CodeType;
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UINT8 Indicator;
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UINT16 MaxRuntimeImageLength;
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UINT16 ConfigUtilityCodeHeaderOffset;
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UINT16 DMTFCLPEntryPointOffset;
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} PCI_3_0_DATA_STRUCTURE;
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#pragma pack()
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#endif
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