91673dfdfe
This retypes some stack base PCD as 64-bit, and fixes up a number of references to 64-bit PCDs (including the retypes ones), to use the correct PcdGet64() accessors. Note that, in the case of FixedPcdGet64, this does not actually caused any problems, since that resolves to an immediate value. But the generic PcdGetxx accessors should be typed according to the size of the PCD. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Leo Duran <leo.duran@amd.com> [ard.biesheuvel: fixed up some instances in the 32-bit ARM code] Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
94 lines
2.6 KiB
NASM
94 lines
2.6 KiB
NASM
//
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// Copyright (c) 2011-2013, ARM Limited. All rights reserved.
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//
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// This program and the accompanying materials
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// are licensed and made available under the terms and conditions of the BSD License
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// which accompanies this distribution. The full text of the license may be found at
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// http://opensource.org/licenses/bsd-license.php
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//
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// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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//
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//
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#include <AsmMacroIoLib.h>
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#include <Base.h>
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#include <Library/PcdLib.h>
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#include <AutoGen.h>
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INCLUDE AsmMacroIoLib.inc
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IMPORT CEntryPoint
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IMPORT ArmPlatformGetCorePosition
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IMPORT ArmPlatformIsPrimaryCore
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IMPORT ArmReadMpidr
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IMPORT ArmPlatformPeiBootAction
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EXPORT _ModuleEntryPoint
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PRESERVE8
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AREA PrePeiCoreEntryPoint, CODE, READONLY
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StartupAddr DCD CEntryPoint
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_ModuleEntryPoint
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// Do early platform specific actions
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bl ArmPlatformPeiBootAction
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// Identify CPU ID
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bl ArmReadMpidr
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// Keep a copy of the MpId register value
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mov r5, r0
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// Is it the Primary Core ?
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bl ArmPlatformIsPrimaryCore
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// Get the top of the primary stacks (and the base of the secondary stacks)
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LoadConstantToReg (FixedPcdGet64(PcdCPUCoresStackBase), r1)
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LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
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add r1, r1, r2
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// r0 is equal to 1 if I am the primary core
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cmp r0, #1
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beq _SetupPrimaryCoreStack
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_SetupSecondaryCoreStack
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// r1 contains the base of the secondary stacks
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// Get the Core Position
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mov r6, r1 // Save base of the secondary stacks
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mov r0, r5
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bl ArmPlatformGetCorePosition
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// The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack
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add r0, r0, #1
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// StackOffset = CorePos * StackSize
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r2)
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mul r0, r0, r2
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// SP = StackBase + StackOffset
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add sp, r6, r0
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_PrepareArguments
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// The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
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LoadConstantToReg (FixedPcdGet32(PcdFvBaseAddress), r2)
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add r2, r2, #4
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ldr r1, [r2]
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// Move sec startup address into a data register
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// Ensure we're jumping to FV version of the code (not boot remapped alias)
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ldr r3, StartupAddr
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// Jump to PrePeiCore C code
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// r0 = mp_id
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// r1 = pei_core_address
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mov r0, r5
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blx r3
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_SetupPrimaryCoreStack
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mov sp, r1
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b _PrepareArguments
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_NeverReturn
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b _NeverReturn
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END
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