Maurice Ma 937f5cb6ac CorebootPayloadPkg DSC: Change the section alignment option ...

The current CorebootPayloadPkg will print the following message
"InsertImageRecord - Section Alignment(0x20) is not 4K" during
boot. It is caused by the section alignment arranged by the linker.
This patch change the alignment to 4K for runtime drivers.

Cc: Prince Agyeman <prince.agyeman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>

2016-10-26 14:52:49 -07:00

..

FbGop

CorebootPayloadPkg: Switch to use generic BdxDxe driver

2016-05-20 10:11:56 -07:00

Library

CorebootPayloadPkg/PciHostBridgeLib: Fix the wrong PCI resource limit

2016-10-18 22:21:53 -07:00

BuildAndIntegrationInstructions.txt

CorebootPayloadPkg: Rename CorebootPayloadPkgX64.dsc X64 -> Ia32X64

2015-04-14 00:23:17 +00:00

Contributions.txt

Coreboot*Pkg/Contributions.txt: Update example email address

2015-04-14 00:23:29 +00:00

CorebootPayloadPkg.dec

CorebootPayloadPkg: Add coreboot PlatfromBootManagerLib implementation

2016-05-20 10:11:55 -07:00

CorebootPayloadPkg.fdf

CorebootPayloadPkg DSC: Change the section alignment option

2016-10-26 14:52:49 -07:00

CorebootPayloadPkgIa32.dsc

CorebootPayloadPkg DSC: Change the section alignment option

2016-10-26 14:52:49 -07:00

CorebootPayloadPkgIa32X64.dsc

CorebootPayloadPkg DSC: Change the section alignment option

2016-10-26 14:52:49 -07:00

License.txt

Pkg-Module: Add Coreboot Payload Package

2015-03-25 21:13:26 +00:00