1. Define the transfer protocol revision mechanism. Increase the revision number to 0.2 and inform user to use the latest one when the HOST software is too old. New HOST software will implement logic to handle all other revision mismatch cases. 2. Define new debug message packet to print the debug agent trace information by debug port channel. 3. Add check sum mechanism in the communication protocol between TARGET/HOST. 4. Introduced one "try" mechanism to avoid Debug Agent crashed by some invalid HOST command. 5. Enable the late-attach feature: Change the break in from "!" to "\xFC". Add a new short symbol "\xFA" for attach and a new debug command for detach. 6. Support Terminal work on debug port by install EFI Serial IO protocol upon Debug Communication Library. 7. Enable CPUID feature. 8. Enable the hardware data breakpoint. 9. add handshake to improve usb debug cable identify stability issue. 10.Refine all the communication protocol packet to improve extensibility and debugging performance. a. Use 64bit for IO port address. b. Add additional Width field to READ_MEMORY/WRITE_MEMORY. c. Add SEARCH_SIGNATURE support to speed the symbol finding for late attach. d. Remove READ_GROUP register. e. Add READ_ALL_REGISTERS support (WinDbg always requests to read all registers). 11.Move AcquireDebugPortControl () in advance to fix resource collision on IpiSentByApFlag. 12.Fix IO break point does not work issue in PEI phase. 13.Avoid BSP/APs collision when they met break point at the same time. 14.Solve a bug of calculating debug handle in sec phase. 15.Use mailbox content at Dxe phase but not clear it and reinitialize again. 16.Fix FP/MMX/XMM/IO/MSR access issue in both Gdb and WinDbg. Signed-off-by: Jeff Fan <jeff.fan@intel.com> Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13437 6f19259b-4bc3-4df7-8a09-765794883524
367 lines
8.1 KiB
ArmAsm
367 lines
8.1 KiB
ArmAsm
#------------------------------------------------------------------------------
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#
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# Copyright (c) 2010 - 2012, Intel Corporation. All rights reserved.<BR>
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php.
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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# Module Name:
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#
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# AsmFuncs.S
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#
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# Abstract:
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#
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# Debug interrupt handle functions.
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#
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#------------------------------------------------------------------------------
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#include "DebugException.h"
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ASM_GLOBAL ASM_PFX(InterruptProcess)
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ASM_GLOBAL ASM_PFX(Exception0Handle)
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ASM_GLOBAL ASM_PFX(ExceptionStubHeaderSize)
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ASM_GLOBAL ASM_PFX(TimerInterruptHandle)
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ASM_GLOBAL ASM_PFX(CommonEntry)
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.data
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ASM_PFX(ExceptionStubHeaderSize): .word ASM_PFX(Exception1Handle) - ASM_PFX(Exception0Handle)
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.text
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ASM_PFX(Exception0Handle):
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cli
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pushl %eax
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mov $0, %eax
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jmp ASM_PFX(CommonEntry)
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ASM_PFX(Exception1Handle):
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cli
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pushl %eax
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mov $1, %eax
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jmp ASM_PFX(CommonEntry)
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ASM_PFX(Exception2Handle):
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cli
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pushl %eax
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mov $2, %eax
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jmp ASM_PFX(CommonEntry)
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ASM_PFX(Exception3Handle):
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cli
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pushl %eax
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mov $3, %eax
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jmp ASM_PFX(CommonEntry)
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ASM_PFX(Exception4Handle):
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cli
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pushl %eax
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mov $4, %eax
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jmp ASM_PFX(CommonEntry)
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ASM_PFX(Exception5Handle):
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cli
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pushl %eax
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mov $5, %eax
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jmp ASM_PFX(CommonEntry)
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ASM_PFX(Exception6Handle):
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cli
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pushl %eax
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mov $6, %eax
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jmp ASM_PFX(CommonEntry)
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ASM_PFX(Exception7Handle):
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cli
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pushl %eax
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mov $7, %eax
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jmp ASM_PFX(CommonEntry)
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ASM_PFX(Exception8Handle):
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cli
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pushl %eax
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mov $8, %eax
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jmp ASM_PFX(CommonEntry)
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ASM_PFX(Exception9Handle):
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cli
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pushl %eax
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mov $9, %eax
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jmp ASM_PFX(CommonEntry)
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ASM_PFX(Exception10Handle):
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cli
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pushl %eax
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mov $10, %eax
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jmp ASM_PFX(CommonEntry)
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ASM_PFX(Exception11Handle):
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cli
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pushl %eax
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mov $11, %eax
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jmp ASM_PFX(CommonEntry)
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ASM_PFX(Exception12Handle):
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cli
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pushl %eax
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mov $12, %eax
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jmp ASM_PFX(CommonEntry)
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ASM_PFX(Exception13Handle):
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cli
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pushl %eax
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mov $13, %eax
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jmp ASM_PFX(CommonEntry)
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ASM_PFX(Exception14Handle):
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cli
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pushl %eax
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mov $14, %eax
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jmp ASM_PFX(CommonEntry)
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ASM_PFX(Exception15Handle):
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cli
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pushl %eax
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mov $15, %eax
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jmp ASM_PFX(CommonEntry)
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ASM_PFX(Exception16Handle):
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cli
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pushl %eax
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mov $16, %eax
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jmp ASM_PFX(CommonEntry)
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ASM_PFX(Exception17Handle):
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cli
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pushl %eax
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mov $17, %eax
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jmp ASM_PFX(CommonEntry)
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ASM_PFX(Exception18Handle):
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cli
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pushl %eax
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mov $18, %eax
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jmp ASM_PFX(CommonEntry)
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ASM_PFX(Exception19Handle):
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cli
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pushl %eax
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mov $19, %eax
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jmp ASM_PFX(CommonEntry)
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ASM_PFX(TimerInterruptHandle):
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cli
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pushl %eax
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mov $32, %eax
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jmp ASM_PFX(CommonEntry)
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ASM_PFX(CommonEntry):
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#---------------------------------------;
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# _CommonEntry ;
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#----------------------------------------------------------------------------;
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# The follow algorithm is used for the common interrupt routine.
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# Entry from each interrupt with a push eax and eax=interrupt number
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#
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# +---------------------+
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# + EFlags +
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# +---------------------+
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# + CS +
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# +---------------------+
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# + EIP +
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# +---------------------+
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# + Error Code +
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# +---------------------+
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# + EAX / Vector Number +
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# +---------------------+
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# + EBP +
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# +---------------------+ <-- EBP
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#
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# We need to determine if any extra data was pushed by the exception
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cmpl $DEBUG_EXCEPT_DOUBLE_FAULT, %eax
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je NoExtrPush
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cmpl $DEBUG_EXCEPT_INVALID_TSS, %eax
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je NoExtrPush
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cmpl $DEBUG_EXCEPT_SEG_NOT_PRESENT, %eax
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je NoExtrPush
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cmpl $DEBUG_EXCEPT_STACK_FAULT, %eax
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je NoExtrPush
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cmpl $DEBUG_EXCEPT_GP_FAULT, %eax
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je NoExtrPush
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cmpl $DEBUG_EXCEPT_PAGE_FAULT, %eax
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je NoExtrPush
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cmpl $DEBUG_EXCEPT_ALIGNMENT_CHECK, %eax
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je NoExtrPush
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pushl (%esp)
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movl $0, 4(%esp)
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NoExtrPush:
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pushl %ebp
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movl %esp,%ebp
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#
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# Align stack to make sure that EFI_FX_SAVE_STATE_IA32 of EFI_SYSTEM_CONTEXT_IA32
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# is 16-byte aligned
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#
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andl $0xfffffff0,%esp
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subl $12,%esp
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## UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
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pushl 0x4(%ebp)
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pushl %ebx
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pushl %ecx
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pushl %edx
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mov %eax, %ebx # save vector in ebx
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leal 24(%ebp),%ecx
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pushl %ecx # save original ESP
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pushl (%ebp)
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pushl %esi
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pushl %edi
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## UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
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movl %cr4, %eax
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orl $0x208,%eax
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movl %eax, %cr4
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pushl %eax
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movl %cr3, %eax
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pushl %eax
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movl %cr2, %eax
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pushl %eax
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xorl %eax,%eax
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pushl %eax
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movl %cr0, %eax
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pushl %eax
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## UINT32 Gs, Fs, Es, Ds, Cs, Ss;
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movl %ss,%eax
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pushl %eax
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movzwl 16(%ebp), %eax
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pushl %eax
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movl %ds,%eax
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pushl %eax
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movl %es,%eax
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pushl %eax
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movl %fs,%eax
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pushl %eax
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movl %gs,%eax
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pushl %eax
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## UINT32 Eip;
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pushl 12(%ebp)
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## UINT32 Gdtr[2], Idtr[2];
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subl $8,%esp
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sidt (%esp)
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subl $8,%esp
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sgdt (%esp)
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## UINT32 Ldtr, Tr;
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xorl %eax,%eax
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strl %eax
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pushl %eax
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sldtl %eax
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pushl %eax
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## UINT32 EFlags;
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pushl 20(%ebp)
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## UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
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movl %dr7, %eax
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pushl %eax
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## clear Dr7 while executing debugger itself
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xorl %eax,%eax
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# movl %eax, %dr7
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movl %dr6, %eax
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pushl %eax
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## insure all status bits in dr6 are clear...
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xorl %eax,%eax
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movl %eax, %dr6
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movl %dr3, %eax
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pushl %eax
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movl %dr2, %eax
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pushl %eax
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movl %dr1, %eax
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pushl %eax
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movl %dr0, %eax
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pushl %eax
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## FX_SAVE_STATE_IA32 FxSaveState;
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subl $512,%esp
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movl %esp,%edi
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.byte 0x0f, 0xae, 0x07 # fxsave [edi]
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## save the exception data
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pushl 8(%esp)
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## Clear Direction Flag
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cld
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## Prepare parameter and call C function
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pushl %esp
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pushl %ebx
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call ASM_PFX(InterruptProcess)
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addl $8,%esp
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## skip the exception data
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addl $4,%esp
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## FX_SAVE_STATE_IA32 FxSaveState;
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movl %esp,%esi
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.byte 0x0f, 0xae, 0x0e # fxrstor [esi]
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addl $512,%esp
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## UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
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popl %eax
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movl %eax, %dr0
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popl %eax
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movl %eax, %dr1
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popl %eax
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movl %eax, %dr2
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popl %eax
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movl %eax, %dr3
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## skip restore of dr6. We cleared dr6 during the context save.
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addl $4,%esp
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popl %eax
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movl %eax, %dr7
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## UINT32 EFlags;
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popl 20(%ebp)
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## UINT32 Ldtr, Tr;
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## UINT32 Gdtr[2], Idtr[2];
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## Best not let anyone mess with these particular registers...
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addl $24,%esp
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## UINT32 Eip;
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pop 12(%ebp)
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## UINT32 Gs, Fs, Es, Ds, Cs, Ss;
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## NOTE - modified segment registers could hang the debugger... We
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## could attempt to insulate ourselves against this possibility,
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## but that poses risks as well.
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##
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popl %gs
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popl %fs
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popl %es
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popl %ds
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popl 16(%ebp)
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popl %ss
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## UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
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popl %eax
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movl %eax, %cr0
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addl $4,%esp # not for Cr1
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popl %eax
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movl %eax, %cr2
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popl %eax
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movl %eax, %cr3
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popl %eax
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movl %eax, %cr4
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## UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
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popl %edi
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popl %esi
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addl $4,%esp # not for ebp
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addl $4,%esp # not for esp
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popl %edx
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popl %ecx
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popl %ebx
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popl %eax
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movl %ebp,%esp
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popl %ebp
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addl $8,%esp # skip eax
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iretl
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