9686a4678d
(1) SmmRelocationSemaphoreComplete32() runs in 32-bit mode, so wrap it in
a (BITS 32 ... BITS 64) bracket.
(2) SmmRelocationSemaphoreComplete32() currently compiles to:
> 000002AE C6050000000001 mov byte [dword 0x0],0x1
> 000002B5 FF2500000000 jmp dword [dword 0x0]
where the first instruction is patched with the contents of
"mRebasedFlag" (so that (*mRebasedFlag) is set to 1), and the second
instruction is patched with the address of
"mSmmRelocationOriginalAddress" (so that we jump to
"mSmmRelocationOriginalAddress").
In its current form the first instruction could not be patched with
PatchInstructionX86(), given that the operand to patch is not encoded
in the trailing bytes of the instruction. Therefore, adopt an
EAX-based version, inspired by both the IA32 and X64 variants of
SmmRelocationSemaphoreComplete():
> 000002AE 50 push eax
> 000002AF B800000000 mov eax,0x0
> 000002B4 C60001 mov byte [eax],0x1
> 000002B7 58 pop eax
> 000002B8 FF2500000000 jmp dword [dword 0x0]
Here both instructions can be patched with PatchInstructionX86(), and
the DBs can be replaced with native NASM syntax.
(3) Turn the "mRebasedFlagAddr32" and "mSmmRelocationOriginalAddressPtr32"
variables into markers that suit PatchInstructionX86().
Cc: Eric Dong <eric.dong@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=866
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
76 lines
2.3 KiB
C
76 lines
2.3 KiB
C
/** @file
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Semaphore mechanism to indicate to the BSP that an AP has exited SMM
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after SMBASE relocation.
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Copyright (c) 2009 - 2015, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include "PiSmmCpuDxeSmm.h"
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X86_ASSEMBLY_PATCH_LABEL gPatchSmmRelocationOriginalAddressPtr32;
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X86_ASSEMBLY_PATCH_LABEL gPatchRebasedFlagAddr32;
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UINTN mSmmRelocationOriginalAddress;
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volatile BOOLEAN *mRebasedFlag;
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/**
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AP Semaphore operation in 32-bit mode while BSP runs in 64-bit mode.
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**/
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VOID
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SmmRelocationSemaphoreComplete32 (
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VOID
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);
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/**
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Hook return address of SMM Save State so that semaphore code
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can be executed immediately after AP exits SMM to indicate to
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the BSP that an AP has exited SMM after SMBASE relocation.
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@param[in] CpuIndex The processor index.
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@param[in] RebasedFlag A pointer to a flag that is set to TRUE
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immediately after AP exits SMM.
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**/
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VOID
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SemaphoreHook (
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IN UINTN CpuIndex,
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IN volatile BOOLEAN *RebasedFlag
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)
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{
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SMRAM_SAVE_STATE_MAP *CpuState;
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UINTN TempValue;
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mRebasedFlag = RebasedFlag;
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PatchInstructionX86 (
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gPatchRebasedFlagAddr32,
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(UINT32)(UINTN)mRebasedFlag,
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4
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);
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CpuState = (SMRAM_SAVE_STATE_MAP *)(UINTN)(SMM_DEFAULT_SMBASE + SMRAM_SAVE_STATE_MAP_OFFSET);
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mSmmRelocationOriginalAddress = HookReturnFromSmm (
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CpuIndex,
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CpuState,
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(UINT64)(UINTN)&SmmRelocationSemaphoreComplete32,
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(UINT64)(UINTN)&SmmRelocationSemaphoreComplete
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);
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//
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// Use temp value to fix ICC complier warning
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//
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TempValue = (UINTN)&mSmmRelocationOriginalAddress;
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PatchInstructionX86 (
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gPatchSmmRelocationOriginalAddressPtr32,
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(UINT32)TempValue,
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4
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);
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}
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