Ray Ni 9cb8974f06 CpuPageTableLib: Split the page entry when LA is aligned but PA is not ...

When PageTableMap() is called to create non 1:1 mapping
such as [0, 1G) to [8K, 1G+8K), it should split the page entry to the
4K page level, but old logic has a bug that it just uses 1G page
entry.

The patch fixes the bug.

Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>

2022-08-09 07:08:05 +00:00

..

CpuPageTable.h

UefiCpuPkg: Create CpuPageTableLib for manipulating X86 paging structs

2022-08-09 07:08:05 +00:00

CpuPageTableLib.inf

UefiCpuPkg: Create CpuPageTableLib for manipulating X86 paging structs

2022-08-09 07:08:05 +00:00

CpuPageTableMap.c

CpuPageTableLib: Split the page entry when LA is aligned but PA is not

2022-08-09 07:08:05 +00:00

CpuPageTableParse.c

UefiCpuPkg: Create CpuPageTableLib for manipulating X86 paging structs

2022-08-09 07:08:05 +00:00