6bec5a66ea
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3893 1.Added SecFspSecPlatformLibNull support for X64. 2.Added X64 support to IntelFsp2Pkg.dsc. Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Ashraf Ali S <ashraf.ali.s@intel.com> Signed-off-by: Ted Kuo <ted.kuo@intel.com> Reviewed-by: Chasel Chiu <chasel.chiu@intel.com> Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
41 lines
753 B
NASM
41 lines
753 B
NASM
;; @file
|
|
; SEC CAR function
|
|
;
|
|
; Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
|
|
; SPDX-License-Identifier: BSD-2-Clause-Patent
|
|
;;
|
|
|
|
;
|
|
; Define assembler characteristics
|
|
;
|
|
|
|
%macro RET_RSI 0
|
|
|
|
movd rsi, mm7 ; move ReturnAddress from MM7 to RSI
|
|
jmp rsi
|
|
|
|
%endmacro
|
|
|
|
SECTION .text
|
|
|
|
;-----------------------------------------------------------------------------
|
|
;
|
|
; Section: SecCarInit
|
|
;
|
|
; Description: This function initializes the Cache for Data, Stack, and Code
|
|
;
|
|
;-----------------------------------------------------------------------------
|
|
global ASM_PFX(SecCarInit)
|
|
ASM_PFX(SecCarInit):
|
|
|
|
;
|
|
; Set up CAR
|
|
;
|
|
|
|
xor rax, rax
|
|
|
|
SecCarInitExit:
|
|
|
|
RET_RSI
|
|
|