d3febfd9ad
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3790 Replace Opcode with the corresponding instructions. The code changes have been verified with CompareBuild.py tool, which can be used to compare the results of two different EDK II builds to determine if they generate the same binaries. (tool link: https://github.com/mdkinney/edk2/tree/sandbox/CompareBuild) Signed-off-by: Jason Lou <yun.lou@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com>
56 lines
1.7 KiB
NASM
56 lines
1.7 KiB
NASM
;------------------------------------------------------------------------------
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;
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; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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; Module Name:
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;
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; EnablePaging64.Asm
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;
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; Abstract:
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;
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; AsmEnablePaging64 function
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;
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; Notes:
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;
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;------------------------------------------------------------------------------
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SECTION .text
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;------------------------------------------------------------------------------
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; VOID
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; EFIAPI
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; InternalX86EnablePaging64 (
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; IN UINT16 Cs,
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; IN UINT64 EntryPoint,
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; IN UINT64 Context1, OPTIONAL
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; IN UINT64 Context2, OPTIONAL
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; IN UINT64 NewStack
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; );
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;------------------------------------------------------------------------------
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global ASM_PFX(InternalX86EnablePaging64)
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ASM_PFX(InternalX86EnablePaging64):
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cli
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mov DWORD [esp], .0 ; offset for far retf, seg is the 1st arg
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mov eax, cr4
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or al, (1 << 5)
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mov cr4, eax ; enable PAE
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mov ecx, 0xc0000080
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rdmsr
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or ah, 1 ; set LME
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wrmsr
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mov eax, cr0
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bts eax, 31 ; set PG
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mov cr0, eax ; enable paging
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retf ; topmost 2 dwords hold the address
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.0:
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BITS 64
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mov rbx, [esp]
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mov rcx, [esp + 8]
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mov rdx, [esp + 0x10]
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mov rsp, [esp + 0x18]
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add rsp, -0x20
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call rbx
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hlt ; no one should get here
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