cd24eb578b
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 Add LoongArch LOONGARCH64 BaseLib functions. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Co-authored-by: Baoqi Zhang <zhangbaoqi@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
50 lines
1.5 KiB
ArmAsm
50 lines
1.5 KiB
ArmAsm
#------------------------------------------------------------------------------
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#
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# Set/Long jump for LoongArch
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#
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# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>
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#
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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#------------------------------------------------------------------------------
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#define STORE st.d /* 64 bit mode regsave instruction */
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#define LOAD ld.d /* 64 bit mode regload instruction */
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#define RSIZE 8 /* 64 bit mode register size */
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ASM_GLOBAL ASM_PFX(SetJump)
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ASM_GLOBAL ASM_PFX(InternalLongJump)
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ASM_PFX(SetJump):
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STORE $s0, $a0, RSIZE * 0
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STORE $s1, $a0, RSIZE * 1
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STORE $s2, $a0, RSIZE * 2
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STORE $s3, $a0, RSIZE * 3
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STORE $s4, $a0, RSIZE * 4
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STORE $s5, $a0, RSIZE * 5
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STORE $s6, $a0, RSIZE * 6
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STORE $s7, $a0, RSIZE * 7
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STORE $s8, $a0, RSIZE * 8
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STORE $sp, $a0, RSIZE * 9
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STORE $fp, $a0, RSIZE * 10
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STORE $ra, $a0, RSIZE * 11
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li.w $a0, 0 # Setjmp return
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jirl $zero, $ra, 0
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ASM_PFX(InternalLongJump):
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LOAD $ra, $a0, RSIZE * 11
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LOAD $s0, $a0, RSIZE * 0
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LOAD $s1, $a0, RSIZE * 1
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LOAD $s2, $a0, RSIZE * 2
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LOAD $s3, $a0, RSIZE * 3
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LOAD $s4, $a0, RSIZE * 4
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LOAD $s5, $a0, RSIZE * 5
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LOAD $s6, $a0, RSIZE * 6
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LOAD $s7, $a0, RSIZE * 7
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LOAD $s8, $a0, RSIZE * 8
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LOAD $sp, $a0, RSIZE * 9
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LOAD $fp, $a0, RSIZE * 10
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move $a0, $a1
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jirl $zero, $ra, 0
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.end
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