d25fd8710d
The current SSE2 implementation of the ZeroMem(), SetMem(), SetMem16(), SetMem32 and SetMem64 functions is writing 16 bytes per 16 bytes. It hurts the performances so bad that this is even slower than a simple 'rep stos' (4% slower) in regular DRAM. To take full advantages of the 'movntdq' instruction it is better to "queue" a total of 64 bytes in the write combining buffers. This patch implement such a change. Below is a table where I measured (with 'rdtsc') the time to write an entire 100MB RAM buffer. These functions operate almost two times faster. | Function | Arch | Untouched | 64 bytes | Result | |----------+------+-----------+----------+--------| | ZeroMem | Ia32 | 17765947 | 9136062 | 1.945x | | ZeroMem | X64 | 17525170 | 9233391 | 1.898x | | SetMem | Ia32 | 17522291 | 9137272 | 1.918x | | SetMem | X64 | 17949261 | 9176978 | 1.956x | | SetMem16 | Ia32 | 18219673 | 9372062 | 1.944x | | SetMem16 | X64 | 17523331 | 9275184 | 1.889x | | SetMem32 | Ia32 | 18495036 | 9273053 | 1.994x | | SetMem32 | X64 | 17368864 | 9285885 | 1.870x | | SetMem64 | Ia32 | 18564473 | 9241362 | 2.009x | | SetMem64 | X64 | 17506951 | 9280148 | 1.886x | Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
69 lines
2.1 KiB
NASM
69 lines
2.1 KiB
NASM
;------------------------------------------------------------------------------
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;
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; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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; Module Name:
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;
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; SetMem.nasm
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;
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; Abstract:
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;
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; SetMem function
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;
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; Notes:
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;
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;------------------------------------------------------------------------------
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DEFAULT REL
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SECTION .text
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;------------------------------------------------------------------------------
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; VOID *
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; InternalMemSetMem (
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; IN VOID *Buffer,
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; IN UINTN Count,
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; IN UINT8 Value
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; )
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;------------------------------------------------------------------------------
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global ASM_PFX(InternalMemSetMem)
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ASM_PFX(InternalMemSetMem):
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push rdi
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mov rdi, rcx ; rdi <- Buffer
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mov al, r8b ; al <- Value
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mov r9, rdi ; r9 <- Buffer as return value
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xor rcx, rcx
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sub rcx, rdi
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and rcx, 15 ; rcx + rdi aligns on 16-byte boundary
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jz .0
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cmp rcx, rdx
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cmova rcx, rdx
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sub rdx, rcx
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rep stosb
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.0:
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mov rcx, rdx
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and rdx, 63
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shr rcx, 6
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jz @SetBytes
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mov ah, al ; ax <- Value repeats twice
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movdqa [rsp + 0x10], xmm0 ; save xmm0
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movd xmm0, eax ; xmm0[0..16] <- Value repeats twice
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pshuflw xmm0, xmm0, 0 ; xmm0[0..63] <- Value repeats 8 times
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movlhps xmm0, xmm0 ; xmm0 <- Value repeats 16 times
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.1:
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movntdq [rdi], xmm0 ; rdi should be 16-byte aligned
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movntdq [rdi + 16], xmm0
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movntdq [rdi + 32], xmm0
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movntdq [rdi + 48], xmm0
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add rdi, 64
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loop .1
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mfence
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movdqa xmm0, [rsp + 0x10] ; restore xmm0
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@SetBytes:
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mov ecx, edx ; high 32 bits of rcx are always zero
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rep stosb
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mov rax, r9 ; rax <- Return value
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pop rdi
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ret
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