1ae5bee967
Add interrupt node to the AML description of the serial-port only if the IRQ ID from the Configuration Manager is a valid SPI (shared processor interrupt) or an extended SPI. So, for DBG2 UART ports where interrupt is not mandatory, adding of an interrupt node in the AML description using Serial Port Fixup Library can be ignored if the UART is not defined with a valid SPI, like in N1SDP. This update generates the interrupt node for the valid SPI range using the AML Codegen API instead of updating it using the AML Fixup API. Cc: Sami Mujawar <Sami.Mujawar@arm.com> Cc: Pierre Gondois <pierre.gondois@arm.com> Signed-off-by: Himanshu Sharma <Himanshu.Sharma@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
66 lines
2.4 KiB
Plaintext
66 lines
2.4 KiB
Plaintext
/** @file
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SSDT Serial Template
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Copyright (c) 2019 - 2024, Arm Limited. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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@par Reference(s):
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- Arm Server Base Boot Requirements (SBBR), s4.2.1.8 "SPCR".
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@par Glossary:
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- {template} - Data fixed up using AML Fixup APIs.
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- {codegen} - Data generated using AML Codegen APIs.
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**/
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DefinitionBlock ("SsdtSerialPortTemplate.aml", "SSDT", 2, "ARMLTD", "SERIAL", 1) {
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Scope (_SB) {
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// UART PL011
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Device (COM0) { // {template}
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Name (_UID, 0x0) // {template}
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Name (_HID, "HID0000") // {template}
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Name (_CID, "CID0000") // {template}
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Method(_STA) {
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Return(0xF)
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}
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Name (_CRS, ResourceTemplate() {
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QWordMemory (
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, // ResourceUsage
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, // Decode
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, // IsMinFixed
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, // IsMaxFixed
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, // Cacheable
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ReadWrite, // ReadAndWrite
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0x0, // AddressGranularity
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0xA0000000, // AddressMinimum // {template}
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0xAFFFFFFF, // AddressMaximum // {template}
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0, // AddressTranslation
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0x10000000, // RangeLength // {template}
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, // ResourceSourceIndex
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, // ResourceSource
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, // DescriptorName
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, // MemoryRangeType
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// TranslationType
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) // QWordMemory
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// The Interrupt information is generated using AmlCodegen.
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//
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// Interrupt ( // {codegen}
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// ResourceConsumer, // ResourceUsage
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// Level, // EdgeLevel
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// ActiveHigh, // ActiveLevel
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// Exclusive, // Shared
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// , // ResourceSourceIndex
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// , // ResourceSource
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// // DescriptorName
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// ) {
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// <IRQ> // <spi>
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// } // Interrupt
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}) // Name
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} // Device
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} // Scope (_SB)
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}
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