4d1014093f
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4182 Use gMmst instead of gSmst. Replace SmmServicesTableLib with MmServicesTableLib. Cc: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Abner Chang <abner.chang@amd.com> Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
133 lines
4.4 KiB
C
133 lines
4.4 KiB
C
/** @file
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Provides common supporting function to access SMRAM Save State Map
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Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.<BR>
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Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include "MmSaveState.h"
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// Table used by MmSaveStateGetRegisterIndex() to convert an EFI_MM_SAVE_STATE_REGISTER
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// value to an index into a table of type CPU_MM_SAVE_STATE_LOOKUP_ENTRY
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CONST CPU_MM_SAVE_STATE_REGISTER_RANGE mCpuRegisterRanges[] = {
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MM_REGISTER_RANGE (EFI_MM_SAVE_STATE_REGISTER_GDTBASE, EFI_MM_SAVE_STATE_REGISTER_LDTINFO),
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MM_REGISTER_RANGE (EFI_MM_SAVE_STATE_REGISTER_ES, EFI_MM_SAVE_STATE_REGISTER_RIP),
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MM_REGISTER_RANGE (EFI_MM_SAVE_STATE_REGISTER_RFLAGS, EFI_MM_SAVE_STATE_REGISTER_CR4),
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{ (EFI_MM_SAVE_STATE_REGISTER)0, (EFI_MM_SAVE_STATE_REGISTER)0, 0}
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};
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extern CONST CPU_MM_SAVE_STATE_LOOKUP_ENTRY mCpuWidthOffset[];
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/**
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Read information from the CPU save state.
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@param Register Specifies the CPU register to read form the save state.
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@param RegOffset Offset for the next register index.
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@retval 0 Register is not valid
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@retval >0 Index into mCpuWidthOffset[] associated with Register
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**/
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UINTN
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MmSaveStateGetRegisterIndex (
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IN EFI_MM_SAVE_STATE_REGISTER Register,
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IN UINTN RegOffset
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)
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{
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UINTN Index;
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UINTN Offset;
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for (Index = 0, Offset = RegOffset; mCpuRegisterRanges[Index].Length != 0; Index++) {
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if ((Register >= mCpuRegisterRanges[Index].Start) && (Register <= mCpuRegisterRanges[Index].End)) {
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return Register - mCpuRegisterRanges[Index].Start + Offset;
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}
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Offset += mCpuRegisterRanges[Index].Length;
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}
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return 0;
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}
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/**
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Read a CPU Save State register on the target processor.
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This function abstracts the differences that whether the CPU Save State register is in the
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IA32 CPU Save State Map or X64 CPU Save State Map.
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This function supports reading a CPU Save State register in SMBase relocation handler.
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@param[in] CpuIndex Specifies the zero-based index of the CPU save state.
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@param[in] RegisterIndex Index into mCpuWidthOffset[] look up table.
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@param[in] Width The number of bytes to read from the CPU save state.
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@param[out] Buffer Upon return, this holds the CPU register value read from the save state.
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@retval EFI_SUCCESS The register was read from Save State.
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@retval EFI_NOT_FOUND The register is not defined for the Save State of Processor.
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@retval EFI_INVALID_PARAMTER This or Buffer is NULL.
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**/
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EFI_STATUS
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MmSaveStateReadRegisterByIndex (
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IN UINTN CpuIndex,
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IN UINTN RegisterIndex,
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IN UINTN Width,
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OUT VOID *Buffer
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)
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{
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if (RegisterIndex == 0) {
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return EFI_NOT_FOUND;
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}
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if (MmSaveStateGetRegisterLma () == EFI_MM_SAVE_STATE_REGISTER_LMA_32BIT) {
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//
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// If 32-bit mode width is zero, then the specified register can not be accessed
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//
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if (mCpuWidthOffset[RegisterIndex].Width32 == 0) {
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return EFI_NOT_FOUND;
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}
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//
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// If Width is bigger than the 32-bit mode width, then the specified register can not be accessed
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//
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if (Width > mCpuWidthOffset[RegisterIndex].Width32) {
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return EFI_INVALID_PARAMETER;
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}
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//
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// Write return buffer
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//
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ASSERT (gMmst->CpuSaveState[CpuIndex] != NULL);
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CopyMem (Buffer, (UINT8 *)gMmst->CpuSaveState[CpuIndex] + mCpuWidthOffset[RegisterIndex].Offset32, Width);
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} else {
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//
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// If 64-bit mode width is zero, then the specified register can not be accessed
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//
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if (mCpuWidthOffset[RegisterIndex].Width64 == 0) {
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return EFI_NOT_FOUND;
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}
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//
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// If Width is bigger than the 64-bit mode width, then the specified register can not be accessed
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//
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if (Width > mCpuWidthOffset[RegisterIndex].Width64) {
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return EFI_INVALID_PARAMETER;
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}
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//
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// Write lower 32-bits of return buffer
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//
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CopyMem (Buffer, (UINT8 *)gMmst->CpuSaveState[CpuIndex] + mCpuWidthOffset[RegisterIndex].Offset64Lo, MIN (4, Width));
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if (Width > 4) {
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//
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// Write upper 32-bits of return buffer
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//
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CopyMem ((UINT8 *)Buffer + 4, (UINT8 *)gMmst->CpuSaveState[CpuIndex] + mCpuWidthOffset[RegisterIndex].Offset64Hi, Width - 4);
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}
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}
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return EFI_SUCCESS;
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}
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