596cecff81
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@6922 6f19259b-4bc3-4df7-8a09-765794883524
643 lines
17 KiB
C
643 lines
17 KiB
C
/** @file
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I/O Library.
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The implementation of I/O operation for this library instance
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are based on EFI_CPU_IO_PROTOCOL.
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Copyright (c) 2006, Intel Corporation<BR>
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All rights reserved. This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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Module Name: IoLib.c
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**/
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#include "DxeCpuIoLibInternal.h"
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//
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// Globle varible to cache pointer to CpuIo protocol.
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//
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EFI_CPU_IO_PROTOCOL *mCpuIo = NULL;
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EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *mPciRootBridgeIo = NULL;
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/**
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The constructor function caches the pointer to CpuIo protocol.
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The constructor function locates CpuIo protocol from protocol database.
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It will ASSERT() if that operation fails and it will always return EFI_SUCCESS.
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@param ImageHandle The firmware allocated handle for the EFI image.
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@param SystemTable A pointer to the EFI System Table.
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@retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.
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**/
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EFI_STATUS
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EFIAPI
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IoLibConstructor (
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IN EFI_HANDLE ImageHandle,
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IN EFI_SYSTEM_TABLE *SystemTable
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)
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{
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EFI_STATUS Status;
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Status = gBS->LocateProtocol (&gEfiPciRootBridgeIoProtocolGuid, NULL, (VOID **) &mPciRootBridgeIo);
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if (EFI_ERROR (Status)) {
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Status = gBS->LocateProtocol (&gEfiCpuIoProtocolGuid, NULL, (VOID **) &mCpuIo);
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}
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ASSERT_EFI_ERROR (Status);
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return Status;
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}
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/**
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Reads registers in the EFI CPU I/O space.
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Reads the I/O port specified by Port with registers width specified by Width.
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The read value is returned. If such operations are not supported, then ASSERT().
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This function must guarantee that all I/O read and write operations are serialized.
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@param Port The base address of the I/O operation.
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The caller is responsible for aligning the Address if required.
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@param Width The width of the I/O operation.
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@return Data read from registers in the EFI CPU I/O space.
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**/
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UINT64
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EFIAPI
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IoReadWorker (
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IN UINTN Port,
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IN EFI_CPU_IO_PROTOCOL_WIDTH Width
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)
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{
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EFI_STATUS Status;
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UINT64 Data;
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if (mPciRootBridgeIo != NULL) {
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Status = mPciRootBridgeIo->Io.Read (mPciRootBridgeIo, (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width, Port, 1, &Data);
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} else {
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Status = mCpuIo->Io.Read (mCpuIo, Width, Port, 1, &Data);
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}
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ASSERT_EFI_ERROR (Status);
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return Data;
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}
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/**
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Writes registers in the EFI CPU I/O space.
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Writes the I/O port specified by Port with registers width and value specified by Width
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and Data respectively. Data is returned. If such operations are not supported, then ASSERT().
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This function must guarantee that all I/O read and write operations are serialized.
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@param Port The base address of the I/O operation.
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The caller is responsible for aligning the Address if required.
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@param Width The width of the I/O operation.
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@param Data The value to write to the I/O port.
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@return The paramter of Data.
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**/
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UINT64
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EFIAPI
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IoWriteWorker (
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IN UINTN Port,
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IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
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IN UINT64 Data
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)
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{
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EFI_STATUS Status;
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if (mPciRootBridgeIo != NULL) {
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Status = mPciRootBridgeIo->Io.Write (mPciRootBridgeIo, (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width, Port, 1, &Data);
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} else {
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Status = mCpuIo->Io.Write (mCpuIo, Width, Port, 1, &Data);
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}
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ASSERT_EFI_ERROR (Status);
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return Data;
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}
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/**
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Reads memory-mapped registers in the EFI system memory space.
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Reads the MMIO registers specified by Address with registers width specified by Width.
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The read value is returned. If such operations are not supported, then ASSERT().
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This function must guarantee that all MMIO read and write operations are serialized.
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@param Address The MMIO register to read.
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The caller is responsible for aligning the Address if required.
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@param Width The width of the I/O operation.
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@return Data read from registers in the EFI system memory space.
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**/
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UINT64
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EFIAPI
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MmioReadWorker (
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IN UINTN Address,
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IN EFI_CPU_IO_PROTOCOL_WIDTH Width
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)
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{
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EFI_STATUS Status;
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UINT64 Data;
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if (mPciRootBridgeIo != NULL) {
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Status = mPciRootBridgeIo->Mem.Read (mPciRootBridgeIo, (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width, Address, 1, &Data);
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} else {
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Status = mCpuIo->Mem.Read (mCpuIo, Width, Address, 1, &Data);
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}
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ASSERT_EFI_ERROR (Status);
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return Data;
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}
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/**
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Writes memory-mapped registers in the EFI system memory space.
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Writes the MMIO registers specified by Address with registers width and value specified by Width
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and Data respectively. Data is returned. If such operations are not supported, then ASSERT().
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This function must guarantee that all MMIO read and write operations are serialized.
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@param Address The MMIO register to read.
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The caller is responsible for aligning the Address if required.
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@param Width The width of the I/O operation.
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@param Data The value to write to the I/O port.
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@return Data read from registers in the EFI system memory space.
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**/
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UINT64
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EFIAPI
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MmioWriteWorker (
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IN UINTN Address,
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IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
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IN UINT64 Data
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)
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{
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EFI_STATUS Status;
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if (mPciRootBridgeIo != NULL) {
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Status = mPciRootBridgeIo->Mem.Write (mPciRootBridgeIo, (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width, Address, 1, &Data);
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} else {
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Status = mCpuIo->Mem.Write (mCpuIo, Width, Address, 1, &Data);
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}
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ASSERT_EFI_ERROR (Status);
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return Data;
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}
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/**
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Reads an 8-bit I/O port.
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Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
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This function must guarantee that all I/O read and write operations are
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serialized.
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If 8-bit I/O port operations are not supported, then ASSERT().
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@param Port The I/O port to read.
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@return The value read.
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**/
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UINT8
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EFIAPI
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IoRead8 (
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IN UINTN Port
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)
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{
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return (UINT8)IoReadWorker (Port, EfiCpuIoWidthUint8);
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}
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/**
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Writes an 8-bit I/O port.
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Writes the 8-bit I/O port specified by Port with the value specified by Value
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and returns Value. This function must guarantee that all I/O read and write
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operations are serialized.
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If 8-bit I/O port operations are not supported, then ASSERT().
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@param Port The I/O port to write.
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@param Value The value to write to the I/O port.
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@return The value written the I/O port.
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**/
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UINT8
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EFIAPI
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IoWrite8 (
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IN UINTN Port,
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IN UINT8 Value
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)
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{
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return (UINT8)IoWriteWorker (Port, EfiCpuIoWidthUint8, Value);
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}
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/**
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Reads a 16-bit I/O port.
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Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
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This function must guarantee that all I/O read and write operations are
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serialized.
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If Port is not aligned on a 16-bit boundary, then ASSERT().
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If 16-bit I/O port operations are not supported, then ASSERT().
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@param Port The I/O port to read.
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@return The value read.
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**/
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UINT16
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EFIAPI
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IoRead16 (
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IN UINTN Port
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)
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{
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//
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// Make sure Port is aligned on a 16-bit boundary.
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//
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ASSERT ((Port & 1) == 0);
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return (UINT16)IoReadWorker (Port, EfiCpuIoWidthUint16);
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}
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/**
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Writes a 16-bit I/O port.
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Writes the 16-bit I/O port specified by Port with the value specified by Value
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and returns Value. This function must guarantee that all I/O read and write
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operations are serialized.
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If Port is not aligned on a 16-bit boundary, then ASSERT().
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If 16-bit I/O port operations are not supported, then ASSERT().
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@param Port The I/O port to write.
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@param Value The value to write to the I/O port.
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@return The value written the I/O port.
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**/
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UINT16
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EFIAPI
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IoWrite16 (
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IN UINTN Port,
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IN UINT16 Value
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)
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{
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//
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// Make sure Port is aligned on a 16-bit boundary.
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//
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ASSERT ((Port & 1) == 0);
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return (UINT16)IoWriteWorker (Port, EfiCpuIoWidthUint16, Value);
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}
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/**
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Reads a 32-bit I/O port.
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Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
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This function must guarantee that all I/O read and write operations are
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serialized.
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If Port is not aligned on a 32-bit boundary, then ASSERT().
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If 32-bit I/O port operations are not supported, then ASSERT().
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@param Port The I/O port to read.
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@return The value read.
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**/
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UINT32
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EFIAPI
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IoRead32 (
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IN UINTN Port
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)
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{
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//
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// Make sure Port is aligned on a 32-bit boundary.
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//
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ASSERT ((Port & 3) == 0);
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return (UINT32)IoReadWorker (Port, EfiCpuIoWidthUint32);
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}
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/**
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Writes a 32-bit I/O port.
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Writes the 32-bit I/O port specified by Port with the value specified by Value
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and returns Value. This function must guarantee that all I/O read and write
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operations are serialized.
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If Port is not aligned on a 32-bit boundary, then ASSERT().
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If 32-bit I/O port operations are not supported, then ASSERT().
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@param Port The I/O port to write.
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@param Value The value to write to the I/O port.
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@return The value written the I/O port.
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**/
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UINT32
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EFIAPI
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IoWrite32 (
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IN UINTN Port,
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IN UINT32 Value
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)
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{
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//
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// Make sure Port is aligned on a 32-bit boundary.
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//
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ASSERT ((Port & 3) == 0);
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return (UINT32)IoWriteWorker (Port, EfiCpuIoWidthUint32, Value);
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}
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/**
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Reads a 64-bit I/O port.
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Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.
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This function must guarantee that all I/O read and write operations are
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serialized.
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If Port is not aligned on a 64-bit boundary, then ASSERT().
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If 64-bit I/O port operations are not supported, then ASSERT().
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@param Port The I/O port to read.
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@return The value read.
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**/
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UINT64
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EFIAPI
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IoRead64 (
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IN UINTN Port
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)
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{
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//
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// Make sure Port is aligned on a 64-bit boundary.
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//
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ASSERT ((Port & 7) == 0);
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return IoReadWorker (Port, EfiCpuIoWidthUint64);
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}
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/**
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Writes a 64-bit I/O port.
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Writes the 64-bit I/O port specified by Port with the value specified by Value
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and returns Value. This function must guarantee that all I/O read and write
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operations are serialized.
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If Port is not aligned on a 64-bit boundary, then ASSERT().
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If 64-bit I/O port operations are not supported, then ASSERT().
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@param Port The I/O port to write.
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@param Value The value to write to the I/O port.
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@return The value written the I/O port.
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**/
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UINT64
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EFIAPI
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IoWrite64 (
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IN UINTN Port,
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IN UINT64 Value
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)
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{
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//
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// Make sure Port is aligned on a 64-bit boundary.
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//
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ASSERT ((Port & 7) == 0);
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return IoWriteWorker (Port, EfiCpuIoWidthUint64, Value);
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}
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/**
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Reads an 8-bit MMIO register.
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Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
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returned. This function must guarantee that all MMIO read and write
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operations are serialized.
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If 8-bit MMIO register operations are not supported, then ASSERT().
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@param Address The MMIO register to read.
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@return The value read.
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**/
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UINT8
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EFIAPI
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MmioRead8 (
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IN UINTN Address
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)
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{
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return (UINT8)MmioReadWorker (Address, EfiCpuIoWidthUint8);
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}
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/**
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Writes an 8-bit MMIO register.
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Writes the 8-bit MMIO register specified by Address with the value specified
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by Value and returns Value. This function must guarantee that all MMIO read
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and write operations are serialized.
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If 8-bit MMIO register operations are not supported, then ASSERT().
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@param Address The MMIO register to write.
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@param Value The value to write to the MMIO register.
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**/
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UINT8
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EFIAPI
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MmioWrite8 (
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IN UINTN Address,
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IN UINT8 Value
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)
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{
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return (UINT8)MmioWriteWorker (Address, EfiCpuIoWidthUint8, Value);
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}
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/**
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Reads a 16-bit MMIO register.
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Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
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returned. This function must guarantee that all MMIO read and write
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operations are serialized.
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If Address is not aligned on a 16-bit boundary, then ASSERT().
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If 16-bit MMIO register operations are not supported, then ASSERT().
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@param Address The MMIO register to read.
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@return The value read.
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**/
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UINT16
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EFIAPI
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MmioRead16 (
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IN UINTN Address
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)
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{
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//
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// Make sure Address is aligned on a 16-bit boundary.
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//
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ASSERT ((Address & 1) == 0);
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return (UINT16)MmioReadWorker (Address, EfiCpuIoWidthUint16);
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}
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/**
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Writes a 16-bit MMIO register.
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Writes the 16-bit MMIO register specified by Address with the value specified
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by Value and returns Value. This function must guarantee that all MMIO read
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and write operations are serialized.
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If Address is not aligned on a 16-bit boundary, then ASSERT().
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If 16-bit MMIO register operations are not supported, then ASSERT().
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@param Address The MMIO register to write.
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@param Value The value to write to the MMIO register.
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**/
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UINT16
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EFIAPI
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MmioWrite16 (
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IN UINTN Address,
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IN UINT16 Value
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)
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{
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//
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// Make sure Address is aligned on a 16-bit boundary.
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//
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ASSERT ((Address & 1) == 0);
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return (UINT16)MmioWriteWorker (Address, EfiCpuIoWidthUint16, Value);
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}
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/**
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Reads a 32-bit MMIO register.
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Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
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returned. This function must guarantee that all MMIO read and write
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operations are serialized.
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If Address is not aligned on a 32-bit boundary, then ASSERT().
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If 32-bit MMIO register operations are not supported, then ASSERT().
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@param Address The MMIO register to read.
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@return The value read.
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**/
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UINT32
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EFIAPI
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MmioRead32 (
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IN UINTN Address
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)
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{
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//
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// Make sure Address is aligned on a 32-bit boundary.
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//
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ASSERT ((Address & 3) == 0);
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return (UINT32)MmioReadWorker (Address, EfiCpuIoWidthUint32);
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}
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/**
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Writes a 32-bit MMIO register.
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Writes the 32-bit MMIO register specified by Address with the value specified
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by Value and returns Value. This function must guarantee that all MMIO read
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and write operations are serialized.
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If Address is not aligned on a 32-bit boundary, then ASSERT().
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If 32-bit MMIO register operations are not supported, then ASSERT().
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@param Address The MMIO register to write.
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@param Value The value to write to the MMIO register.
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**/
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UINT32
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EFIAPI
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MmioWrite32 (
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IN UINTN Address,
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IN UINT32 Value
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)
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{
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//
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// Make sure Address is aligned on a 32-bit boundary.
|
|
//
|
|
ASSERT ((Address & 3) == 0);
|
|
return (UINT32)MmioWriteWorker (Address, EfiCpuIoWidthUint32, Value);
|
|
}
|
|
|
|
/**
|
|
Reads a 64-bit MMIO register.
|
|
|
|
Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
|
|
returned. This function must guarantee that all MMIO read and write
|
|
operations are serialized.
|
|
|
|
If Address is not aligned on a 64-bit boundary, then ASSERT().
|
|
|
|
If 64-bit MMIO register operations are not supported, then ASSERT().
|
|
|
|
@param Address The MMIO register to read.
|
|
|
|
@return The value read.
|
|
|
|
**/
|
|
UINT64
|
|
EFIAPI
|
|
MmioRead64 (
|
|
IN UINTN Address
|
|
)
|
|
{
|
|
//
|
|
// Make sure Address is aligned on a 64-bit boundary.
|
|
//
|
|
ASSERT ((Address & 7) == 0);
|
|
return (UINT64)MmioReadWorker (Address, EfiCpuIoWidthUint64);
|
|
}
|
|
|
|
/**
|
|
Writes a 64-bit MMIO register.
|
|
|
|
Writes the 64-bit MMIO register specified by Address with the value specified
|
|
by Value and returns Value. This function must guarantee that all MMIO read
|
|
and write operations are serialized.
|
|
|
|
If Address is not aligned on a 64-bit boundary, then ASSERT().
|
|
|
|
If 64-bit MMIO register operations are not supported, then ASSERT().
|
|
|
|
@param Address The MMIO register to write.
|
|
@param Value The value to write to the MMIO register.
|
|
|
|
**/
|
|
UINT64
|
|
EFIAPI
|
|
MmioWrite64 (
|
|
IN UINTN Address,
|
|
IN UINT64 Value
|
|
)
|
|
{
|
|
//
|
|
// Make sure Address is aligned on a 64-bit boundary.
|
|
//
|
|
ASSERT ((Address & 7) == 0);
|
|
return (UINT64)MmioWriteWorker (Address, EfiCpuIoWidthUint64, Value);
|
|
}
|