git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@3 6f19259b-4bc3-4df7-8a09-765794883524
		
			
				
	
	
		
			193 lines
		
	
	
		
			7.4 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
			
		
		
	
	
			193 lines
		
	
	
		
			7.4 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
| //++
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| // Copyright (c) 2006, Intel Corporation                                                         
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| // All rights reserved. This program and the accompanying materials                          
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| // are licensed and made available under the terms and conditions of the BSD License         
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| // which accompanies this distribution.  The full text of the license may be found at        
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| // http://opensource.org/licenses/bsd-license.php                                            
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| //                                                                                           
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| // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
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| // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
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| // 
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| //  Module Name:
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| //
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| //    IpfCpuCore.s
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| //
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| //  Abstract:
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| //    IPF Specific assembly routines
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| //
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| //-- 
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| 
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| .file  "IpfCpuCore.s"
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| 
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| #include  "IpfMacro.i"
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| #include  "IpfCpuCore.i"
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| 
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| //----------------------------------------------------------------------------------
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| // This module supports terminating CAR (Cache As RAM) stage. It copies all the
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| // CAR data into real RAM and then makes a stack switch.
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| 
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| // EFI_STATUS
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| // SwitchCoreStacks (
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| //   IN VOID  *EntryPoint,
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| //   IN UINTN CopySize,
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| //   IN VOID  *OldBase,
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| //   IN VOID  *NewBase
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| //   IN UINTN NewSP, OPTIONAL
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| //   IN UINTN NewBSP OPTIONAL
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| //   )
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| // EFI_STATUS
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| // SwitchCoreStacks (
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| //   IN VOID  *EntryPointForContinuationFunction,
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| //   IN UINTN StartupDescriptor,
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| //   IN VOID  PEICorePointer,
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| //   IN UINTN NewSP
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| //   )
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| //----------------------------------------------------------------------------------
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| PROCEDURE_ENTRY (SwitchCoreStacks)
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| 
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|         NESTED_SETUP (4,2,0,0)
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| 
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|         // first save all stack registers in GPRs.
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|         mov     r13 = in0;;             // this is a pointer to the PLABEL of the continuation function.  
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|         ld8     r16 = [r13],8;;         // r16 = address of continuation function from the PLABEL
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|         ld8     gp = [r13];;            // gp  = gp of continuation function from the PLABEL
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|         mov     b1 = r16;;
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| 
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|         // save the parameters in r5, r6. these 2 seemed to be preserved across PAL calls
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|         mov     r5 = in1;;              // this is the parameter1 to pass to the continuation function
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|         mov     r6 = in2;;              // this is the parameter2 to pass to the continuation function
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|         dep     r6=0,r6,63,1;;          // zero the bit 63.
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| 
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|         mov     r8 = in3;;              // new stack pointer.
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| 
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|         // r8 has the sp, this is 128K stack size, from this we will reserve 16K for the bspstore 
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|         movl    r15 = PEI_BSP_STORE_SIZE;;
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|         sub     r8 = r8, r15;;
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|         add     r15 = (GuardBand),r8;;  // some little buffer, now r15 will be our bspstore
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| 
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|         // save the bspstore value to r4, save sp value to r7
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|         mov     r4  = r15
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|         mov     r7  = r8
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|         mov     r16 = r8;;              // will be the new sp in uncache mode
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|       
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| 
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|         alloc   r11=0,0,0,0;;           // Set 0-size frame
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|         flushrs;;
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| 
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|         mov     r21 = RSC_KERNEL_DISABLED;; // for rse disable             
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|         mov     ar.rsc = r21;;          // turn off RSE                
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| 
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|         add     sp = r0, r16            // transfer to the EFI stack
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|         mov     ar.bspstore = r15       // switch to EFI BSP        
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|         invala                          // change of ar.bspstore needs invala.     
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|       
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|         mov     r19 = RSC_KERNEL_LAZ;;  // RSC enabled, Lazy mode
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|         mov     ar.rsc = r19;;          // turn rse on, in kernel mode 
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|                 
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| //-----------------------------------------------------------------------------------
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| // Save here the meaningful stuff for next few lines and then make the PAL call.
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| // Make PAL call to terminate the CAR status.
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|         // AVL: do this only for recovery check call...
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| 
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|         mov     r28=ar.k3;;
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|         dep     r2 = r28,r0,0,8;;       // Extract Function bits from GR20.
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|         cmp.eq  p6,p7 = RecoveryFn,r2;; // Is it Recovery check  
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|         (p7)  br.sptk.few DoneCARTermination; // if not, don't terminate car..
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| 
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| TerminateCAR::
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| 
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|         mov     r28 = ip;;
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|         add     r28 = (DoneCARTerminationPALCall - TerminateCAR),r28;;
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|         mov     b0 = r28
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| 
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|         mov     r8 = ar.k5;;
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|         mov     b6 = r8
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|         mov     r28 = 0x208
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| 
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|         mov     r29 = r0
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|         mov     r30 = r0
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|         mov     r31 = r0
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|         mov     r8 = r0;;
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|         br.sptk.few b6;;                // Call PAL-A call.
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| 
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| DoneCARTerminationPALCall::
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| 
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| // don't check error in soft sdv, it is always returning -1 for this call for some reason
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| #if SOFT_SDV
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| #else
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| ReturnToPEIMain::
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|         cmp.eq  p6,p7 = r8,r0;;
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|         //
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|         // dead loop if the PAL call failed, we have the CAR on but the stack is now pointing to memory
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|         //
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|         (p7) br.sptk.few ReturnToPEIMain;; 
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|         //
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|         // PAL call successed,now the stack are in memory so come into cache mode 
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|         // instead of uncache mode
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|         //
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| 
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|         alloc   r11=0,0,0,0;;           // Set 0-size frame
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|         flushrs;;
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|      
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|         mov     r21 = RSC_KERNEL_DISABLED;; // for rse disable             
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|         mov     ar.rsc = r21;;          // turn off RSE                
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|     
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|         dep     r6 = 0,r6,63,1          // zero the bit 63                               
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|         dep     r7 = 0,r7,63,1          // zero the bit 63    
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|         dep     r4 = 0,r4,63,1;;        // zero the bit 63   
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|         add     sp = r0, r7             // transfer to the EFI stack in cache mode    
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|         mov     ar.bspstore = r4        // switch to EFI BSP        
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|         invala                          // change of ar.bspstore needs invala.     
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|     
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|         mov     r19 = RSC_KERNEL_LAZ;;  // RSC enabled, Lazy mode
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|         mov     ar.rsc = r19;;          // turn rse on, in kernel mode
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| 
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| #endif
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| 
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| DoneCARTermination::                                                                    
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| 
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|         // allocate a stack frame:                  
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|         alloc   r11=0,2,2,0 ;;          // alloc  outs going to ensuing DXE IPL service
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|                                                                                                 // on the new stack
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|         mov     out0 = r5;;
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|         mov     out1 = r6;;        
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| 
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|         mov     r16 = b1;;
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|         mov     b6 = r16;;
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|         br.call.sptk.few b0=b6;;        // Call the continuation function
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| 
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|         NESTED_RETURN
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| 
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| PROCEDURE_EXIT(SwitchCoreStacks)
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| //-----------------------------------------------------------------------------------
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| 
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| //---------------------------------------------------------------------------------
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| //++
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| // GetHandOffStatus
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| //
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| // This routine is called by all processors simultaneously, to get some hand-off
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| // status that has been captured by IPF dispatcher and recorded in kernel registers.
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| //
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| // Arguments : 
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| //
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| // On Entry :  None.
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| //
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| // Return Value: Lid, R20Status.
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| // 
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| //--
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| //----------------------------------------------------------------------------------
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| PROCEDURE_ENTRY (GetHandOffStatus)
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|         
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|         NESTED_SETUP (0,2+0,0,0)
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| 
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|         mov     r8 = ar.k6              // Health Status (Self test params)
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|         mov     r9 = ar.k4              // LID bits
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|         mov     r10 = ar.k3;;           // SAL_E entry state
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|         mov     r11 = ar.k7             // Return address to PAL
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|         
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|         NESTED_RETURN
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| PROCEDURE_EXIT (GetHandOffStatus)
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| //----------------------------------------------------------------------------------
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| 
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| 
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