a75568e9c9
For instance, in case of CpuHotPlug boot path the platform has already been initialized. The CPU core should not execute any of the platform initialization in this case. Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13492 6f19259b-4bc3-4df7-8a09-765794883524
88 lines
3.3 KiB
ArmAsm
88 lines
3.3 KiB
ArmAsm
#========================================================================================
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# Copyright (c) 2011-2012, ARM Limited. All rights reserved.
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http:#opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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#=======================================================================================
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#start of the code section
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.text
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.align 3
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GCC_ASM_EXPORT(return_from_exception)
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GCC_ASM_EXPORT(enter_monitor_mode)
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GCC_ASM_EXPORT(copy_cpsr_into_spsr)
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GCC_ASM_EXPORT(set_non_secure_mode)
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# r0: Monitor World EntryPoint
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# r1: MpId
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# r2: SecBootMode
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# r3: Secure Monitor mode stack
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ASM_PFX(enter_monitor_mode):
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cmp r3, #0 @ If a Secure Monitor stack base has not been defined then use the Secure stack
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moveq r3, sp
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mrs r4, cpsr @ Save current mode (SVC) in r4
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bic r5, r4, #0x1f @ Clear all mode bits
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orr r5, r5, #0x16 @ Set bits for Monitor mode
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msr cpsr_cxsf, r5 @ We are now in Monitor Mode
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mov sp, r3 @ Set the stack of the Monitor Mode
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mov lr, r0 @ Use the pass entrypoint as lr
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msr spsr_cxsf, r4 @ Use saved mode for the MOVS jump to the kernel
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mov r4, r0 @ Swap EntryPoint and MpId registers
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mov r0, r1
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mov r1, r2
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mov r2, r3
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bx r4
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# We cannot use the instruction 'movs pc, lr' because the caller can be written either in ARM or Thumb2 assembler.
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# When we will jump into this function, we will set the CPSR flag to ARM assembler. By copying directly 'lr' into
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# 'pc'; we will not change the CPSR flag and it will crash.
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# The way to fix this limitation is to do the movs into the ARM assmbler code and then do a 'bx'.
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ASM_PFX(return_from_exception):
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ldr lr, returned_exception
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#The following instruction breaks the code.
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#movs pc, lr
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mrs r2, cpsr
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bic r2, r2, #0x1f
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orr r2, r2, #0x13
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msr cpsr_c, r2
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returned_exception: @ We are now in non-secure state
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bx r0
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# Save the current Program Status Register (PSR) into the Saved PSR
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ASM_PFX(copy_cpsr_into_spsr):
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mrs r0, cpsr
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msr spsr_cxsf, r0
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bx lr
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# Set the Non Secure Mode
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ASM_PFX(set_non_secure_mode):
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push { r1 }
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and r0, r0, #0x1f @ Keep only the mode bits
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mrs r1, spsr @ Read the spsr
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bic r1, r1, #0x1f @ Clear all mode bits
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orr r1, r1, r0
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msr spsr_cxsf, r1 @ write back spsr (may have caused a mode switch)
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isb
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pop { r1 }
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bx lr @ return (hopefully thumb-safe!)
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dead:
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b dead
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ASM_FUNCTION_REMOVE_IF_UNREFERENCED
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