3b2928b469
https://bugzilla.tianocore.org/show_bug.cgi?id=565 Fix NASM compatibility issues with XCODE5 tool chain. The XCODE5 tool chain for X64 builds using PIE (Position Independent Executable). For most assembly sources using PIE mode does not cause any issues. However, if assembly code is copied to a different address (such as AP startup code in the MpInitLib), then the X64 assembly source must be implemented to be compatible with PIE mode that uses RIP relative addressing. The specific changes in this patch are: * Use LEA instruction instead of MOV instruction to lookup the addresses of functions. * The assembly function RendezvousFunnelProc() is copied below 1MB so it can be executed as part of the MpInitLib AP startup sequence. RendezvousFunnelProc() calls the external function InitializeFloatingPointUnits(). The absolute address of InitializeFloatingPointUnits() is added to the MP_CPU_EXCHANGE_INFO structure that is passed to RendezvousFunnelProc(). Cc: Andrew Fish <afish@apple.com> Cc: Jeff Fan <jeff.fan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Andrew Fish <afish@apple.com>
45 lines
2.0 KiB
PHP
45 lines
2.0 KiB
PHP
;------------------------------------------------------------------------------ ;
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; Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>
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; This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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; http://opensource.org/licenses/bsd-license.php.
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;
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; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;
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; Module Name:
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;
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; MpEqu.inc
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;
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; Abstract:
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;
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; This is the equates file for Multiple Processor support
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;
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;-------------------------------------------------------------------------------
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VacantFlag equ 00h
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NotVacantFlag equ 0ffh
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CPU_SWITCH_STATE_IDLE equ 0
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CPU_SWITCH_STATE_STORED equ 1
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CPU_SWITCH_STATE_LOADED equ 2
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LockLocation equ (RendezvousFunnelProcEnd - RendezvousFunnelProcStart)
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StackStartAddressLocation equ LockLocation + 08h
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StackSizeLocation equ LockLocation + 10h
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ApProcedureLocation equ LockLocation + 18h
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GdtrLocation equ LockLocation + 20h
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IdtrLocation equ LockLocation + 2Ah
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BufferStartLocation equ LockLocation + 34h
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ModeOffsetLocation equ LockLocation + 3Ch
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NumApsExecutingLocation equ LockLocation + 44h
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CodeSegmentLocation equ LockLocation + 4Ch
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DataSegmentLocation equ LockLocation + 54h
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EnableExecuteDisableLocation equ LockLocation + 5Ch
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Cr3Location equ LockLocation + 64h
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InitFlagLocation equ LockLocation + 6Ch
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CpuInfoLocation equ LockLocation + 74h
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InitializeFloatingPointUnitsAddress equ LockLocation + 84h
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