c8ec22a266
Contributed-under: TianoCore Contribution Agreement 1.0 Signed off by: Ravi Rangarajan <ravi.p.rangarajan@intel.com> Reviewed by: Maurice Ma <maurice.ma@intel.com> Reviewed by: Jiewen Yao <jiewen.yao@intel.com> Reviewed by: Giri Mudusuru <giri.p.mudusuru@intel.com> Reviewed by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15705 6f19259b-4bc3-4df7-8a09-765794883524
60 lines
2.9 KiB
C
60 lines
2.9 KiB
C
/** @file
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Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php.
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef _CACHE_LIB_INTERNAL_H_
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#define _CACHE_LIB_INTERNAL_H_
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#define EFI_MSR_CACHE_VARIABLE_MTRR_BASE 0x00000200
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#define EFI_MSR_CACHE_VARIABLE_MTRR_END 0x0000020F
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#define V_EFI_FIXED_MTRR_NUMBER 11
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#define EFI_MSR_IA32_MTRR_FIX64K_00000 0x00000250
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#define EFI_MSR_IA32_MTRR_FIX16K_80000 0x00000258
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#define EFI_MSR_IA32_MTRR_FIX16K_A0000 0x00000259
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#define EFI_MSR_IA32_MTRR_FIX4K_C0000 0x00000268
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#define EFI_MSR_IA32_MTRR_FIX4K_C8000 0x00000269
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#define EFI_MSR_IA32_MTRR_FIX4K_D0000 0x0000026A
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#define EFI_MSR_IA32_MTRR_FIX4K_D8000 0x0000026B
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#define EFI_MSR_IA32_MTRR_FIX4K_E0000 0x0000026C
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#define EFI_MSR_IA32_MTRR_FIX4K_E8000 0x0000026D
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#define EFI_MSR_IA32_MTRR_FIX4K_F0000 0x0000026E
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#define EFI_MSR_IA32_MTRR_FIX4K_F8000 0x0000026F
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#define EFI_MSR_CACHE_IA32_MTRR_DEF_TYPE 0x000002FF
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#define B_EFI_MSR_CACHE_MTRR_VALID BIT11
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#define B_EFI_MSR_GLOBAL_MTRR_ENABLE BIT11
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#define B_EFI_MSR_FIXED_MTRR_ENABLE BIT10
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#define B_EFI_MSR_CACHE_MEMORY_TYPE (BIT2 | BIT1 | BIT0)
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#define EFI_MSR_VALID_MASK 0xFFFFFFFFF
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#define EFI_CACHE_VALID_ADDRESS 0xFFFFFF000
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#define EFI_SMRR_CACHE_VALID_ADDRESS 0xFFFFF000
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#define EFI_CACHE_VALID_EXTENDED_ADDRESS 0xFFFFFFFFFF000
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// Leave one MTRR pairs for OS use
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#define EFI_CACHE_NUM_VAR_MTRR_PAIRS_FOR_OS 1
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#define EFI_CACHE_LAST_VARIABLE_MTRR_FOR_BIOS (EFI_MSR_CACHE_VARIABLE_MTRR_END) - \
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(EFI_CACHE_NUM_VAR_MTRR_PAIRS_FOR_OS * 2)
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#define EFI_MSR_IA32_MTRR_CAP 0x000000FE
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#define B_EFI_MSR_IA32_MTRR_CAP_EMRR_SUPPORT BIT12
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#define B_EFI_MSR_IA32_MTRR_CAP_SMRR_SUPPORT BIT11
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#define B_EFI_MSR_IA32_MTRR_CAP_WC_SUPPORT BIT10
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#define B_EFI_MSR_IA32_MTRR_CAP_FIXED_SUPPORT BIT8
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#define B_EFI_MSR_IA32_MTRR_CAP_VARIABLE_SUPPORT (BIT7 | BIT6 | BIT5 | BIT4 | BIT3 | BIT2 | BIT1 | BIT0)
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#define CPUID_VIR_PHY_ADDRESS_SIZE 0x80000008
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#define CPUID_EXTENDED_FUNCTION 0x80000000
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#endif
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