In the next patches, we'll differentiate the PMBA IO port address that we program on PIIX4 vs. Q35. Normally we'd just turn PcdAcpiPmBaseAddress into a dynamic PCD. However, because we need this value in BaseRomAcpiTimerLib too (which cannot access RAM and dynamic PCDs), it must remain a build time constant. We will introduce its Q35 counterpart later. As first step, replace the PCD with a new macro in "OvmfPlatforms.h"; Jordan prefers the latter to fixed PCDs in this instance. Cc: Gabriel Somlo <somlo@cmu.edu> Cc: Jordan Justen <jordan.l.justen@intel.com> Ref: https://bugzilla.redhat.com/show_bug.cgi?id=1333238 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Tested-by: Gabriel Somlo <somlo@cmu.edu>
104 lines
2.7 KiB
C
104 lines
2.7 KiB
C
/** @file
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Provide constructor and GetTick for Base instance of ACPI Timer Library
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Copyright (C) 2014, Gabriel L. Somlo <somlo@cmu.edu>
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This program and the accompanying materials are licensed and made
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available under the terms and conditions of the BSD License which
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accompanies this distribution. The full text of the license may
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be found at http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include <Library/DebugLib.h>
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#include <Library/IoLib.h>
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#include <Library/PciLib.h>
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#include <OvmfPlatforms.h>
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//
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// Cached ACPI Timer IO Address
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//
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STATIC UINT32 mAcpiTimerIoAddr;
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/**
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The constructor function caches the ACPI tick counter address, and,
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if necessary, enables ACPI IO space.
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@retval EFI_SUCCESS The constructor always returns RETURN_SUCCESS.
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**/
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RETURN_STATUS
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EFIAPI
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AcpiTimerLibConstructor (
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VOID
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)
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{
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UINT16 HostBridgeDevId;
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UINTN Pmba;
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UINTN AcpiCtlReg;
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UINT8 AcpiEnBit;
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//
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// Query Host Bridge DID to determine platform type
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//
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HostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);
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switch (HostBridgeDevId) {
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case INTEL_82441_DEVICE_ID:
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Pmba = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMBA);
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AcpiCtlReg = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMREGMISC);
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AcpiEnBit = PIIX4_PMREGMISC_PMIOSE;
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break;
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case INTEL_Q35_MCH_DEVICE_ID:
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Pmba = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE);
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AcpiCtlReg = POWER_MGMT_REGISTER_Q35 (ICH9_ACPI_CNTL);
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AcpiEnBit = ICH9_ACPI_CNTL_ACPI_EN;
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break;
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default:
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DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",
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__FUNCTION__, HostBridgeDevId));
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ASSERT (FALSE);
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return RETURN_UNSUPPORTED;
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}
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//
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// Check to see if the Power Management Base Address is already enabled
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//
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if ((PciRead8 (AcpiCtlReg) & AcpiEnBit) == 0) {
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//
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// If the Power Management Base Address is not programmed,
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// then program it now.
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//
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PciAndThenOr32 (Pmba, (UINT32) ~0xFFC0, PIIX4_PMBA_VALUE);
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//
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// Enable PMBA I/O port decodes
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//
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PciOr8 (AcpiCtlReg, AcpiEnBit);
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}
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mAcpiTimerIoAddr = (PciRead32 (Pmba) & ~PMBA_RTE) + ACPI_TIMER_OFFSET;
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return RETURN_SUCCESS;
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}
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/**
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Internal function to read the current tick counter of ACPI.
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Read the current ACPI tick counter using the counter address cached
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by this instance's constructor.
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@return The tick counter read.
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**/
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UINT32
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InternalAcpiGetTimerTick (
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VOID
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)
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{
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//
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// Return the current ACPI timer value.
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//
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return IoRead32 (mAcpiTimerIoAddr);
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}
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