b5a572238d
This function allows platform to do any specific actions prior to the start the PEI phase. For instance, this function could be used by some platforms to initialize clocks that are required at the early stage of the PEI phase. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> Acked-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14347 6f19259b-4bc3-4df7-8a09-765794883524
69 lines
1.8 KiB
ArmAsm
69 lines
1.8 KiB
ArmAsm
//
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// Copyright (c) 2012-2013, ARM Limited. All rights reserved.
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//
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// This program and the accompanying materials
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// are licensed and made available under the terms and conditions of the BSD License
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// which accompanies this distribution. The full text of the license may be found at
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// http://opensource.org/licenses/bsd-license.php
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//
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// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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//
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//
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#include <AsmMacroIoLib.h>
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#include <Library/ArmLib.h>
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#include <ArmPlatform.h>
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.text
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.align 2
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GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
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GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
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GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
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ASM_PFX(ArmPlatformPeiBootAction):
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bx lr
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//UINTN
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//ArmPlatformGetCorePosition (
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// IN UINTN MpId
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// );
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ASM_PFX(ArmPlatformGetCorePosition):
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and r1, r0, #ARM_CORE_MASK
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and r0, r0, #ARM_CLUSTER_MASK
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add r0, r1, r0, LSR #7
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bx lr
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//UINTN
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//ArmPlatformIsPrimaryCore (
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// IN UINTN MpId
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// );
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ASM_PFX(ArmPlatformIsPrimaryCore):
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// Extract cpu_id and cluster_id from ARM_SCC_CFGREG48
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// with cpu_id[0:3] and cluster_id[4:7]
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LoadConstantToReg (ARM_CTA15A7_SCC_CFGREG48, r1)
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ldr r1, [r1]
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lsr r1, #24
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// Shift the SCC value to get the cluster ID at the offset #8
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lsl r2, r1, #4
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and r2, r2, #0xF00
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// Keep only the cpu ID from the original SCC
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and r1, r1, #0x0F
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// Add the Cluster ID to the Cpu ID
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orr r1, r1, r2
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// Keep the Cluster ID and Core ID from the MPID
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LoadConstantToReg (ARM_CLUSTER_MASK | ARM_CORE_MASK, r2)
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and r0, r0, r2
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// Compare mpid and boot cpu from ARM_SCC_CFGREG48
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cmp r0, r1
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moveq r0, #1
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movne r0, #0
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bx lr
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