949973b6c0
The return_from_exception implementation in Sec/Helper.S (the GCC version) deviates from the RVCT version, in a way that suggests that both may have been broken at some point, and that they weren't fixed in the same way nor at the same time. So bring the GCC version in line with the RVCT version, and at the same time, deobfuscate the comment. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19244 6f19259b-4bc3-4df7-8a09-765794883524
76 lines
2.7 KiB
ArmAsm
76 lines
2.7 KiB
ArmAsm
#========================================================================================
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# Copyright (c) 2011-2014, ARM Limited. All rights reserved.
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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#=======================================================================================
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#start of the code section
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.text
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.align 3
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GCC_ASM_EXPORT(return_from_exception)
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GCC_ASM_EXPORT(enter_monitor_mode)
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GCC_ASM_EXPORT(copy_cpsr_into_spsr)
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GCC_ASM_EXPORT(set_non_secure_mode)
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# r0: Monitor World EntryPoint
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# r1: MpId
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# r2: SecBootMode
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# r3: Secure Monitor mode stack
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ASM_PFX(enter_monitor_mode):
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cmp r3, #0 @ If a Secure Monitor stack base has not been defined then use the Secure stack
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moveq r3, sp
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mrs r4, cpsr @ Save current mode (SVC) in r4
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bic r5, r4, #0x1f @ Clear all mode bits
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orr r5, r5, #0x16 @ Set bits for Monitor mode
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msr cpsr_cxsf, r5 @ We are now in Monitor Mode
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mov sp, r3 @ Set the stack of the Monitor Mode
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mov lr, r0 @ Use the pass entrypoint as lr
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msr spsr_cxsf, r4 @ Use saved mode for the MOVS jump to the kernel
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mov r4, r0 @ Swap EntryPoint and MpId registers
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mov r0, r1
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mov r1, r2
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mov r2, r3
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bx r4
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# Return-from-exception is not an interworking return, so we must do it
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# in two steps, in case r0 has the Thumb bit set.
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ASM_PFX(return_from_exception):
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adr lr, returned_exception
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movs pc, lr
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returned_exception: @ We are now in non-secure state
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bx r0
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# Save the current Program Status Register (PSR) into the Saved PSR
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ASM_PFX(copy_cpsr_into_spsr):
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mrs r0, cpsr
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msr spsr_cxsf, r0
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bx lr
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# Set the Non Secure Mode
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ASM_PFX(set_non_secure_mode):
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push { r1 }
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and r0, r0, #0x1f @ Keep only the mode bits
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mrs r1, spsr @ Read the spsr
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bic r1, r1, #0x1f @ Clear all mode bits
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orr r1, r1, r0
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msr spsr_cxsf, r1 @ write back spsr (may have caused a mode switch)
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isb
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pop { r1 }
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bx lr @ return (hopefully thumb-safe!)
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ASM_FUNCTION_REMOVE_IF_UNREFERENCED
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