c05de360ec
Introduce XenResetVector, a copy of OvmfPkg/ResetVector, with one changes: - SEC_DEFAULT_CR0: enable cache (bit 30 or CD set to 0) Xen copies the OVMF code to RAM, there is no need to disable cache. This new module will later be modified to add a new entry point, more detail in a following commit "OvmfPkg/XenResetVector: Add new entry point for Xen PVH" Value FILE_GUID of XenResetVector have not changed compare to ResetVector because it is a special value (gEfiFirmwareVolumeTopFileGuid). Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1689 Signed-off-by: Anthony PERARD <anthony.perard@citrix.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Message-Id: <20190813113119.14804-4-anthony.perard@citrix.com>
135 lines
3.7 KiB
NASM
135 lines
3.7 KiB
NASM
;------------------------------------------------------------------------------
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; @file
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; Transition from 16 bit real mode into 32 bit flat protected mode
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;
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; Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>
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; Copyright (c) 2019, Citrix Systems, Inc.
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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;------------------------------------------------------------------------------
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%define SEC_DEFAULT_CR0 0x00000023
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%define SEC_DEFAULT_CR4 0x640
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BITS 16
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;
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; Modified: EAX, EBX
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;
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; @param[out] DS Selector allowing flat access to all addresses
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; @param[out] ES Selector allowing flat access to all addresses
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; @param[out] FS Selector allowing flat access to all addresses
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; @param[out] GS Selector allowing flat access to all addresses
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; @param[out] SS Selector allowing flat access to all addresses
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;
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TransitionFromReal16To32BitFlat:
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debugShowPostCode POSTCODE_16BIT_MODE
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cli
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mov bx, 0xf000
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mov ds, bx
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mov bx, ADDR16_OF(gdtr)
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o32 lgdt [cs:bx]
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mov eax, SEC_DEFAULT_CR0
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mov cr0, eax
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jmp LINEAR_CODE_SEL:dword ADDR_OF(jumpTo32BitAndLandHere)
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BITS 32
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jumpTo32BitAndLandHere:
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mov eax, SEC_DEFAULT_CR4
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mov cr4, eax
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debugShowPostCode POSTCODE_32BIT_MODE
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mov ax, LINEAR_SEL
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mov ds, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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mov ss, ax
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OneTimeCallRet TransitionFromReal16To32BitFlat
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ALIGN 2
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gdtr:
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dw GDT_END - GDT_BASE - 1 ; GDT limit
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dd ADDR_OF(GDT_BASE)
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ALIGN 16
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;
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; Macros for GDT entries
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;
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%define PRESENT_FLAG(p) (p << 7)
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%define DPL(dpl) (dpl << 5)
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%define SYSTEM_FLAG(s) (s << 4)
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%define DESC_TYPE(t) (t)
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; Type: data, expand-up, writable, accessed
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%define DATA32_TYPE 3
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; Type: execute, readable, expand-up, accessed
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%define CODE32_TYPE 0xb
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; Type: execute, readable, expand-up, accessed
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%define CODE64_TYPE 0xb
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%define GRANULARITY_FLAG(g) (g << 7)
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%define DEFAULT_SIZE32(d) (d << 6)
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%define CODE64_FLAG(l) (l << 5)
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%define UPPER_LIMIT(l) (l)
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;
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; The Global Descriptor Table (GDT)
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;
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GDT_BASE:
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; null descriptor
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NULL_SEL equ $-GDT_BASE
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DW 0 ; limit 15:0
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DW 0 ; base 15:0
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DB 0 ; base 23:16
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DB 0 ; sys flag, dpl, type
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DB 0 ; limit 19:16, flags
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DB 0 ; base 31:24
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; linear data segment descriptor
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LINEAR_SEL equ $-GDT_BASE
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DW 0xffff ; limit 15:0
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DW 0 ; base 15:0
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DB 0 ; base 23:16
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DB PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(DATA32_TYPE)
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DB GRANULARITY_FLAG(1)|DEFAULT_SIZE32(1)|CODE64_FLAG(0)|UPPER_LIMIT(0xf)
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DB 0 ; base 31:24
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; linear code segment descriptor
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LINEAR_CODE_SEL equ $-GDT_BASE
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DW 0xffff ; limit 15:0
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DW 0 ; base 15:0
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DB 0 ; base 23:16
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DB PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(CODE32_TYPE)
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DB GRANULARITY_FLAG(1)|DEFAULT_SIZE32(1)|CODE64_FLAG(0)|UPPER_LIMIT(0xf)
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DB 0 ; base 31:24
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%ifdef ARCH_X64
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; linear code (64-bit) segment descriptor
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LINEAR_CODE64_SEL equ $-GDT_BASE
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DW 0xffff ; limit 15:0
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DW 0 ; base 15:0
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DB 0 ; base 23:16
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DB PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(CODE64_TYPE)
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DB GRANULARITY_FLAG(1)|DEFAULT_SIZE32(0)|CODE64_FLAG(1)|UPPER_LIMIT(0xf)
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DB 0 ; base 31:24
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%endif
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GDT_END:
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