c5cd360277
Add the BTI instructions and the associated note to make the AArch64 asm objects compatible with BTI enforcement. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com> Reviewed-by: Oliver Smith-Denny <osd@smith-denny.com>
34 lines
869 B
ArmAsm
34 lines
869 B
ArmAsm
#------------------------------------------------------------------------------
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#
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# CpuFlushTlb() for ARM
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#
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# Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
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# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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#------------------------------------------------------------------------------
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.text
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.p2align 2
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GCC_ASM_EXPORT(CpuFlushTlb)
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#/**
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# Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.
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#
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# Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.
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#
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#**/
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#VOID
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#EFIAPI
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#CpuFlushTlb (
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# VOID
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# )#
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#
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ASM_PFX(CpuFlushTlb):
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AARCH64_BTI(c)
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tlbi vmalle1 // Invalidate Inst TLB and Data TLB
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dsb sy
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isb
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ret
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