61a114ba46
We currently just jump to offset 0x200 in the kernel image, in 64-bit mode. This is completely broken. If it's a 32-bit kernel, we'll be jumping into the compressed data payload. If it's a 64-bit kernel, it'll work... but the 0x200 offset is explicitly marked as 'may change in the future', has already changed from 0x100 to 0x200 in the past with no fanfare, and bootloaders are instructed that they should look at the ELF header to find the offset. So although it does actually work today, it's still broken in the "someone needs to whipped for doing it this way" sense of the word. In fact, the same bug exists in other bootloaders so the 0x200 offset probably *is* now set in stone. But still it's only valid to use it if we *know* it's a 64-bit kernel. And we don't. There *is* no ELF header that we can look at when we're booting a bzImage, and we can't rely on it having a PE/COFF header either. The 32-bit entry point is always guaranteed to work, and we need to support it anyway. So let's just *always* use it, in 32-bit mode, and then we don't have to make up some horrible heuristics for detecting 32-bit vs. 64-bit kernels. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14045 6f19259b-4bc3-4df7-8a09-765794883524
72 lines
2.6 KiB
NASM
72 lines
2.6 KiB
NASM
;------------------------------------------------------------------------------
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;
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; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
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;
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; This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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; http://opensource.org/licenses/bsd-license.php.
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;
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; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;
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;------------------------------------------------------------------------------
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.code
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;------------------------------------------------------------------------------
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; VOID
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; EFIAPI
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; JumpToKernel (
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; VOID *KernelStart, // rcx
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; VOID *KernelBootParams // rdx
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; );
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;------------------------------------------------------------------------------
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JumpToKernel PROC
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; Set up for executing kernel. BP in %esi, entry point on the stack
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; (64-bit when the 'ret' will use it as 32-bit, but we're little-endian)
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mov rsi, rdx
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push rcx
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; Jump into the compatibility mode CS
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push 10h
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lea rax, @F
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push rax
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DB 048h, 0cbh ; retfq
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@@:
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; Now in compatibility mode.
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DB 0b8h, 018h, 000h, 000h, 000h ; movl $0x18, %eax
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DB 08eh, 0d8h ; movl %eax, %ds
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DB 08eh, 0c0h ; movl %eax, %es
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DB 08eh, 0e0h ; movl %eax, %fs
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DB 08eh, 0e8h ; movl %eax, %gs
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DB 08eh, 0d0h ; movl %eax, %ss
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; Disable paging
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DB 00fh, 020h, 0c0h ; movl %cr0, %eax
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DB 00fh, 0bah, 0f8h, 01fh ; btcl $31, %eax
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DB 00fh, 022h, 0c0h ; movl %eax, %cr0
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; Disable long mode in EFER
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DB 0b9h, 080h, 000h, 000h, 0c0h ; movl $0x0c0000080, %ecx
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DB 00fh, 032h ; rdmsr
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DB 00fh, 0bah, 0f8h, 008h ; btcl $8, %eax
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DB 00fh, 030h ; wrmsr
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; Disable PAE
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DB 00fh, 020h, 0e0h ; movl %cr4, %eax
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DB 00fh, 0bah, 0f8h, 005h ; btcl $5, %eax
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DB 00fh, 022h, 0e0h ; movl %eax, %cr4
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DB 031h, 0edh ; xor %ebp, %ebp
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DB 031h, 0ffh ; xor %edi, %edi
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DB 031h, 0dbh ; xor %ebx, %ebx
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DB 0c3h ; ret
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JumpToKernel ENDP
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END
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