c788c2b1ad
Commitc7c964banddd01704add header file for FIT table and update MpInitLib to support FIT based microcode shadow operation. There are comments that FIT is Intel specific specification instead of industry standard, which should not be placed in EDK2 MdePkg and UefiCpuPkg. So this patch adds a platform PPI for the microcode shadow logic, and remove the FIT related code from EDK2. The FIT based microcode shadow support will be implemented as a new platform PEIM in IntelSiliconPkg in edk2-platforms. This patch doesn't provide a DXE version shadow microcode protocol, a platform which only uses DxeMpInitLib instance only supports PCD based microcode shadowing. A detailed design doc can be found here: https://edk2.groups.io/g/devel/files/Designs/2020/0214/Support%20 the%202nd%20Microcode%20FV%20Flash%20Region.pdf TEST: Tested on FIT enabled platform. BZ: https://tianocore.acgmultimedia.com/show_bug.cgi?id=2449 Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Siyuan Fu <siyuan.fu@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Acked-by: Laszlo Ersek <lersek@redhat.com>
682 lines
25 KiB
C
682 lines
25 KiB
C
/** @file
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Implementation of loading microcode on processors.
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Copyright (c) 2015 - 2020, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include "MpLib.h"
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/**
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Get microcode update signature of currently loaded microcode update.
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@return Microcode signature.
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**/
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UINT32
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GetCurrentMicrocodeSignature (
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VOID
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)
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{
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MSR_IA32_BIOS_SIGN_ID_REGISTER BiosSignIdMsr;
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AsmWriteMsr64 (MSR_IA32_BIOS_SIGN_ID, 0);
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AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, NULL);
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BiosSignIdMsr.Uint64 = AsmReadMsr64 (MSR_IA32_BIOS_SIGN_ID);
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return BiosSignIdMsr.Bits.MicrocodeUpdateSignature;
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}
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/**
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Detect whether specified processor can find matching microcode patch and load it.
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Microcode Payload as the following format:
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+----------------------------------------+------------------+
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| CPU_MICROCODE_HEADER | |
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+----------------------------------------+ CheckSum Part1 |
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| Microcode Binary | |
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+----------------------------------------+------------------+
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| CPU_MICROCODE_EXTENDED_TABLE_HEADER | |
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+----------------------------------------+ CheckSum Part2 |
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| CPU_MICROCODE_EXTENDED_TABLE | |
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| ... | |
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+----------------------------------------+------------------+
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There may by multiple CPU_MICROCODE_EXTENDED_TABLE in this format.
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The count of CPU_MICROCODE_EXTENDED_TABLE is indicated by ExtendedSignatureCount
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of CPU_MICROCODE_EXTENDED_TABLE_HEADER structure.
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When we are trying to verify the CheckSum32 with extended table.
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We should use the fields of exnteded table to replace the corresponding
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fields in CPU_MICROCODE_HEADER structure, and recalculate the
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CheckSum32 with CPU_MICROCODE_HEADER + Microcode Binary. We named
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it as CheckSum Part3.
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The CheckSum Part2 is used to verify the CPU_MICROCODE_EXTENDED_TABLE_HEADER
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and CPU_MICROCODE_EXTENDED_TABLE parts. We should make sure CheckSum Part2
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is correct before we are going to verify each CPU_MICROCODE_EXTENDED_TABLE.
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Only ProcessorSignature, ProcessorFlag and CheckSum are different between
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CheckSum Part1 and CheckSum Part3. To avoid multiple computing CheckSum Part3.
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Save an in-complete CheckSum32 from CheckSum Part1 for common parts.
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When we are going to calculate CheckSum32, just should use the corresponding part
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of the ProcessorSignature, ProcessorFlag and CheckSum with in-complete CheckSum32.
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Notes: CheckSum32 is not a strong verification.
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It does not guarantee that the data has not been modified.
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CPU has its own mechanism to verify Microcode Binary part.
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@param[in] CpuMpData The pointer to CPU MP Data structure.
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@param[in] ProcessorNumber The handle number of the processor. The range is
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from 0 to the total number of logical processors
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minus 1.
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**/
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VOID
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MicrocodeDetect (
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IN CPU_MP_DATA *CpuMpData,
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IN UINTN ProcessorNumber
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)
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{
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UINT32 ExtendedTableLength;
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UINT32 ExtendedTableCount;
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CPU_MICROCODE_EXTENDED_TABLE *ExtendedTable;
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CPU_MICROCODE_EXTENDED_TABLE_HEADER *ExtendedTableHeader;
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CPU_MICROCODE_HEADER *MicrocodeEntryPoint;
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UINTN MicrocodeEnd;
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UINTN Index;
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UINT8 PlatformId;
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CPUID_VERSION_INFO_EAX Eax;
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CPU_AP_DATA *CpuData;
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UINT32 CurrentRevision;
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UINT32 LatestRevision;
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UINTN TotalSize;
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UINT32 CheckSum32;
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UINT32 InCompleteCheckSum32;
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BOOLEAN CorrectMicrocode;
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VOID *MicrocodeData;
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MSR_IA32_PLATFORM_ID_REGISTER PlatformIdMsr;
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UINT32 ThreadId;
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BOOLEAN IsBspCallIn;
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if (CpuMpData->MicrocodePatchRegionSize == 0) {
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//
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// There is no microcode patches
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//
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return;
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}
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CurrentRevision = GetCurrentMicrocodeSignature ();
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IsBspCallIn = (ProcessorNumber == (UINTN)CpuMpData->BspNumber) ? TRUE : FALSE;
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GetProcessorLocationByApicId (GetInitialApicId (), NULL, NULL, &ThreadId);
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if (ThreadId != 0) {
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//
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// Skip loading microcode if it is not the first thread in one core.
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//
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return;
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}
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ExtendedTableLength = 0;
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//
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// Here data of CPUID leafs have not been collected into context buffer, so
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// GetProcessorCpuid() cannot be used here to retrieve CPUID data.
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//
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AsmCpuid (CPUID_VERSION_INFO, &Eax.Uint32, NULL, NULL, NULL);
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//
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// The index of platform information resides in bits 50:52 of MSR IA32_PLATFORM_ID
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//
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PlatformIdMsr.Uint64 = AsmReadMsr64 (MSR_IA32_PLATFORM_ID);
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PlatformId = (UINT8) PlatformIdMsr.Bits.PlatformId;
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//
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// Check whether AP has same processor with BSP.
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// If yes, direct use microcode info saved by BSP.
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//
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if (!IsBspCallIn) {
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//
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// Get the CPU data for BSP
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//
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CpuData = &(CpuMpData->CpuData[CpuMpData->BspNumber]);
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if ((CpuData->ProcessorSignature == Eax.Uint32) &&
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(CpuData->PlatformId == PlatformId) &&
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(CpuData->MicrocodeEntryAddr != 0)) {
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MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *)(UINTN) CpuData->MicrocodeEntryAddr;
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MicrocodeData = (VOID *) (MicrocodeEntryPoint + 1);
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LatestRevision = MicrocodeEntryPoint->UpdateRevision;
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goto Done;
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}
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}
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LatestRevision = 0;
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MicrocodeData = NULL;
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MicrocodeEnd = (UINTN) (CpuMpData->MicrocodePatchAddress + CpuMpData->MicrocodePatchRegionSize);
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MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (UINTN) CpuMpData->MicrocodePatchAddress;
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do {
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//
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// Check if the microcode is for the Cpu and the version is newer
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// and the update can be processed on the platform
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//
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CorrectMicrocode = FALSE;
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if (MicrocodeEntryPoint->DataSize == 0) {
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TotalSize = sizeof (CPU_MICROCODE_HEADER) + 2000;
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} else {
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TotalSize = sizeof (CPU_MICROCODE_HEADER) + MicrocodeEntryPoint->DataSize;
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}
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///
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/// 0x0 MicrocodeBegin MicrocodeEntry MicrocodeEnd 0xffffffff
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/// |--------------|---------------|---------------|---------------|
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/// valid TotalSize
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/// TotalSize is only valid between 0 and (MicrocodeEnd - MicrocodeEntry).
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/// And it should be aligned with 4 bytes.
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/// If the TotalSize is invalid, skip 1KB to check next entry.
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///
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if ( (UINTN)MicrocodeEntryPoint > (MAX_ADDRESS - TotalSize) ||
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((UINTN)MicrocodeEntryPoint + TotalSize) > MicrocodeEnd ||
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(TotalSize & 0x3) != 0
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) {
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MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (((UINTN) MicrocodeEntryPoint) + SIZE_1KB);
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continue;
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}
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//
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// Save an in-complete CheckSum32 from CheckSum Part1 for common parts.
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//
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InCompleteCheckSum32 = CalculateSum32 (
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(UINT32 *) MicrocodeEntryPoint,
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TotalSize
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);
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InCompleteCheckSum32 -= MicrocodeEntryPoint->ProcessorSignature.Uint32;
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InCompleteCheckSum32 -= MicrocodeEntryPoint->ProcessorFlags;
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InCompleteCheckSum32 -= MicrocodeEntryPoint->Checksum;
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if (MicrocodeEntryPoint->HeaderVersion == 0x1) {
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//
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// It is the microcode header. It is not the padding data between microcode patches
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// because the padding data should not include 0x00000001 and it should be the repeated
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// byte format (like 0xXYXYXYXY....).
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//
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if (MicrocodeEntryPoint->ProcessorSignature.Uint32 == Eax.Uint32 &&
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MicrocodeEntryPoint->UpdateRevision > LatestRevision &&
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(MicrocodeEntryPoint->ProcessorFlags & (1 << PlatformId))
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) {
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//
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// Calculate CheckSum Part1.
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//
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CheckSum32 = InCompleteCheckSum32;
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CheckSum32 += MicrocodeEntryPoint->ProcessorSignature.Uint32;
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CheckSum32 += MicrocodeEntryPoint->ProcessorFlags;
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CheckSum32 += MicrocodeEntryPoint->Checksum;
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if (CheckSum32 == 0) {
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CorrectMicrocode = TRUE;
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}
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} else if ((MicrocodeEntryPoint->DataSize != 0) &&
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(MicrocodeEntryPoint->UpdateRevision > LatestRevision)) {
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ExtendedTableLength = MicrocodeEntryPoint->TotalSize - (MicrocodeEntryPoint->DataSize +
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sizeof (CPU_MICROCODE_HEADER));
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if (ExtendedTableLength != 0) {
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//
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// Extended Table exist, check if the CPU in support list
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//
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ExtendedTableHeader = (CPU_MICROCODE_EXTENDED_TABLE_HEADER *) ((UINT8 *) (MicrocodeEntryPoint)
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+ MicrocodeEntryPoint->DataSize + sizeof (CPU_MICROCODE_HEADER));
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//
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// Calculate Extended Checksum
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//
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if ((ExtendedTableLength % 4) == 0) {
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//
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// Calculate CheckSum Part2.
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//
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CheckSum32 = CalculateSum32 ((UINT32 *) ExtendedTableHeader, ExtendedTableLength);
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if (CheckSum32 == 0) {
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//
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// Checksum correct
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//
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ExtendedTableCount = ExtendedTableHeader->ExtendedSignatureCount;
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ExtendedTable = (CPU_MICROCODE_EXTENDED_TABLE *) (ExtendedTableHeader + 1);
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for (Index = 0; Index < ExtendedTableCount; Index ++) {
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//
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// Calculate CheckSum Part3.
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//
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CheckSum32 = InCompleteCheckSum32;
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CheckSum32 += ExtendedTable->ProcessorSignature.Uint32;
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CheckSum32 += ExtendedTable->ProcessorFlag;
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CheckSum32 += ExtendedTable->Checksum;
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if (CheckSum32 == 0) {
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//
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// Verify Header
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//
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if ((ExtendedTable->ProcessorSignature.Uint32 == Eax.Uint32) &&
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(ExtendedTable->ProcessorFlag & (1 << PlatformId)) ) {
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//
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// Find one
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//
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CorrectMicrocode = TRUE;
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break;
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}
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}
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ExtendedTable ++;
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}
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}
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}
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}
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}
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} else {
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//
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// It is the padding data between the microcode patches for microcode patches alignment.
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// Because the microcode patch is the multiple of 1-KByte, the padding data should not
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// exist if the microcode patch alignment value is not larger than 1-KByte. So, the microcode
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// alignment value should be larger than 1-KByte. We could skip SIZE_1KB padding data to
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// find the next possible microcode patch header.
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//
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MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (((UINTN) MicrocodeEntryPoint) + SIZE_1KB);
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continue;
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}
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//
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// Get the next patch.
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//
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if (MicrocodeEntryPoint->DataSize == 0) {
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TotalSize = 2048;
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} else {
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TotalSize = MicrocodeEntryPoint->TotalSize;
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}
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if (CorrectMicrocode) {
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LatestRevision = MicrocodeEntryPoint->UpdateRevision;
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MicrocodeData = (VOID *) ((UINTN) MicrocodeEntryPoint + sizeof (CPU_MICROCODE_HEADER));
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}
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MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (((UINTN) MicrocodeEntryPoint) + TotalSize);
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} while (((UINTN) MicrocodeEntryPoint < MicrocodeEnd));
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Done:
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if (LatestRevision != 0) {
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//
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// Save the detected microcode patch entry address (including the
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// microcode patch header) for each processor.
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// It will be used when building the microcode patch cache HOB.
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//
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CpuMpData->CpuData[ProcessorNumber].MicrocodeEntryAddr =
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(UINTN) MicrocodeData - sizeof (CPU_MICROCODE_HEADER);
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}
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if (LatestRevision > CurrentRevision) {
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//
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// BIOS only authenticate updates that contain a numerically larger revision
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// than the currently loaded revision, where Current Signature < New Update
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// Revision. A processor with no loaded update is considered to have a
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// revision equal to zero.
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//
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ASSERT (MicrocodeData != NULL);
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AsmWriteMsr64 (
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MSR_IA32_BIOS_UPDT_TRIG,
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(UINT64) (UINTN) MicrocodeData
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);
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//
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// Get and check new microcode signature
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//
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CurrentRevision = GetCurrentMicrocodeSignature ();
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if (CurrentRevision != LatestRevision) {
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AcquireSpinLock(&CpuMpData->MpLock);
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DEBUG ((EFI_D_ERROR, "Updated microcode signature [0x%08x] does not match \
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loaded microcode signature [0x%08x]\n", CurrentRevision, LatestRevision));
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ReleaseSpinLock(&CpuMpData->MpLock);
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}
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}
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}
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/**
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Determine if a microcode patch matchs the specific processor signature and flag.
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@param[in] CpuMpData The pointer to CPU MP Data structure.
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@param[in] ProcessorSignature The processor signature field value
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supported by a microcode patch.
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@param[in] ProcessorFlags The prcessor flags field value supported by
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a microcode patch.
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@retval TRUE The specified microcode patch will be loaded.
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@retval FALSE The specified microcode patch will not be loaded.
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**/
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BOOLEAN
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IsProcessorMatchedMicrocodePatch (
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IN CPU_MP_DATA *CpuMpData,
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IN UINT32 ProcessorSignature,
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IN UINT32 ProcessorFlags
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)
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{
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UINTN Index;
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CPU_AP_DATA *CpuData;
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for (Index = 0; Index < CpuMpData->CpuCount; Index++) {
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CpuData = &CpuMpData->CpuData[Index];
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if ((ProcessorSignature == CpuData->ProcessorSignature) &&
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(ProcessorFlags & (1 << CpuData->PlatformId)) != 0) {
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return TRUE;
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}
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}
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return FALSE;
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}
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/**
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Check the 'ProcessorSignature' and 'ProcessorFlags' of the microcode
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patch header with the CPUID and PlatformID of the processors within
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system to decide if it will be copied into memory.
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@param[in] CpuMpData The pointer to CPU MP Data structure.
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@param[in] MicrocodeEntryPoint The pointer to the microcode patch header.
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@retval TRUE The specified microcode patch need to be loaded.
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@retval FALSE The specified microcode patch dosen't need to be loaded.
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**/
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BOOLEAN
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IsMicrocodePatchNeedLoad (
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IN CPU_MP_DATA *CpuMpData,
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CPU_MICROCODE_HEADER *MicrocodeEntryPoint
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)
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{
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BOOLEAN NeedLoad;
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UINTN DataSize;
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UINTN TotalSize;
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CPU_MICROCODE_EXTENDED_TABLE_HEADER *ExtendedTableHeader;
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UINT32 ExtendedTableCount;
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CPU_MICROCODE_EXTENDED_TABLE *ExtendedTable;
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UINTN Index;
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//
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// Check the 'ProcessorSignature' and 'ProcessorFlags' in microcode patch header.
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//
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NeedLoad = IsProcessorMatchedMicrocodePatch (
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CpuMpData,
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MicrocodeEntryPoint->ProcessorSignature.Uint32,
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MicrocodeEntryPoint->ProcessorFlags
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);
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//
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// If the Extended Signature Table exists, check if the processor is in the
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// support list
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//
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DataSize = MicrocodeEntryPoint->DataSize;
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TotalSize = (DataSize == 0) ? 2048 : MicrocodeEntryPoint->TotalSize;
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if ((!NeedLoad) && (DataSize != 0) &&
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(TotalSize - DataSize > sizeof (CPU_MICROCODE_HEADER) +
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sizeof (CPU_MICROCODE_EXTENDED_TABLE_HEADER))) {
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ExtendedTableHeader = (CPU_MICROCODE_EXTENDED_TABLE_HEADER *) ((UINT8 *) (MicrocodeEntryPoint)
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+ DataSize + sizeof (CPU_MICROCODE_HEADER));
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ExtendedTableCount = ExtendedTableHeader->ExtendedSignatureCount;
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ExtendedTable = (CPU_MICROCODE_EXTENDED_TABLE *) (ExtendedTableHeader + 1);
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for (Index = 0; Index < ExtendedTableCount; Index ++) {
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//
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// Check the 'ProcessorSignature' and 'ProcessorFlag' of the Extended
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// Signature Table entry with the CPUID and PlatformID of the processors
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// within system to decide if it will be copied into memory
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//
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NeedLoad = IsProcessorMatchedMicrocodePatch (
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CpuMpData,
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ExtendedTable->ProcessorSignature.Uint32,
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ExtendedTable->ProcessorFlag
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);
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if (NeedLoad) {
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break;
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}
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ExtendedTable ++;
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}
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}
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return NeedLoad;
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}
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/**
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Actual worker function that shadows the required microcode patches into memory.
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@param[in, out] CpuMpData The pointer to CPU MP Data structure.
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@param[in] Patches The pointer to an array of information on
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the microcode patches that will be loaded
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into memory.
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@param[in] PatchCount The number of microcode patches that will
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be loaded into memory.
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@param[in] TotalLoadSize The total size of all the microcode patches
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to be loaded.
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**/
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VOID
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ShadowMicrocodePatchWorker (
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IN OUT CPU_MP_DATA *CpuMpData,
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IN MICROCODE_PATCH_INFO *Patches,
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IN UINTN PatchCount,
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IN UINTN TotalLoadSize
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)
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{
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UINTN Index;
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VOID *MicrocodePatchInRam;
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UINT8 *Walker;
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ASSERT ((Patches != NULL) && (PatchCount != 0));
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MicrocodePatchInRam = AllocatePages (EFI_SIZE_TO_PAGES (TotalLoadSize));
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if (MicrocodePatchInRam == NULL) {
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return;
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}
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//
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// Load all the required microcode patches into memory
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//
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for (Walker = MicrocodePatchInRam, Index = 0; Index < PatchCount; Index++) {
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CopyMem (
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Walker,
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(VOID *) Patches[Index].Address,
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Patches[Index].Size
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);
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Walker += Patches[Index].Size;
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}
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//
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// Update the microcode patch related fields in CpuMpData
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//
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CpuMpData->MicrocodePatchAddress = (UINTN) MicrocodePatchInRam;
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CpuMpData->MicrocodePatchRegionSize = TotalLoadSize;
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DEBUG ((
|
|
DEBUG_INFO,
|
|
"%a: Required microcode patches have been loaded at 0x%lx, with size 0x%lx.\n",
|
|
__FUNCTION__, CpuMpData->MicrocodePatchAddress, CpuMpData->MicrocodePatchRegionSize
|
|
));
|
|
|
|
return;
|
|
}
|
|
|
|
/**
|
|
Shadow the required microcode patches data into memory according to PCD
|
|
PcdCpuMicrocodePatchAddress and PcdCpuMicrocodePatchRegionSize.
|
|
|
|
@param[in, out] CpuMpData The pointer to CPU MP Data structure.
|
|
**/
|
|
VOID
|
|
ShadowMicrocodePatchByPcd (
|
|
IN OUT CPU_MP_DATA *CpuMpData
|
|
)
|
|
{
|
|
CPU_MICROCODE_HEADER *MicrocodeEntryPoint;
|
|
UINTN MicrocodeEnd;
|
|
UINTN DataSize;
|
|
UINTN TotalSize;
|
|
MICROCODE_PATCH_INFO *PatchInfoBuffer;
|
|
UINTN MaxPatchNumber;
|
|
UINTN PatchCount;
|
|
UINTN TotalLoadSize;
|
|
|
|
//
|
|
// Initialize the microcode patch related fields in CpuMpData as the values
|
|
// specified by the PCD pair. If the microcode patches are loaded into memory,
|
|
// these fields will be updated.
|
|
//
|
|
CpuMpData->MicrocodePatchAddress = PcdGet64 (PcdCpuMicrocodePatchAddress);
|
|
CpuMpData->MicrocodePatchRegionSize = PcdGet64 (PcdCpuMicrocodePatchRegionSize);
|
|
|
|
MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (UINTN) CpuMpData->MicrocodePatchAddress;
|
|
MicrocodeEnd = (UINTN) MicrocodeEntryPoint +
|
|
(UINTN) CpuMpData->MicrocodePatchRegionSize;
|
|
if ((MicrocodeEntryPoint == NULL) || ((UINTN) MicrocodeEntryPoint == MicrocodeEnd)) {
|
|
//
|
|
// There is no microcode patches
|
|
//
|
|
return;
|
|
}
|
|
|
|
PatchCount = 0;
|
|
MaxPatchNumber = DEFAULT_MAX_MICROCODE_PATCH_NUM;
|
|
TotalLoadSize = 0;
|
|
PatchInfoBuffer = AllocatePool (MaxPatchNumber * sizeof (MICROCODE_PATCH_INFO));
|
|
if (PatchInfoBuffer == NULL) {
|
|
return;
|
|
}
|
|
|
|
//
|
|
// Process the header of each microcode patch within the region.
|
|
// The purpose is to decide which microcode patch(es) will be loaded into memory.
|
|
//
|
|
do {
|
|
if (MicrocodeEntryPoint->HeaderVersion != 0x1) {
|
|
//
|
|
// Padding data between the microcode patches, skip 1KB to check next entry.
|
|
//
|
|
MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (((UINTN) MicrocodeEntryPoint) + SIZE_1KB);
|
|
continue;
|
|
}
|
|
|
|
DataSize = MicrocodeEntryPoint->DataSize;
|
|
TotalSize = (DataSize == 0) ? 2048 : MicrocodeEntryPoint->TotalSize;
|
|
if ( (UINTN)MicrocodeEntryPoint > (MAX_ADDRESS - TotalSize) ||
|
|
((UINTN)MicrocodeEntryPoint + TotalSize) > MicrocodeEnd ||
|
|
(DataSize & 0x3) != 0 ||
|
|
(TotalSize & (SIZE_1KB - 1)) != 0 ||
|
|
TotalSize < DataSize
|
|
) {
|
|
//
|
|
// Not a valid microcode header, skip 1KB to check next entry.
|
|
//
|
|
MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (((UINTN) MicrocodeEntryPoint) + SIZE_1KB);
|
|
continue;
|
|
}
|
|
|
|
if (IsMicrocodePatchNeedLoad (CpuMpData, MicrocodeEntryPoint)) {
|
|
PatchCount++;
|
|
if (PatchCount > MaxPatchNumber) {
|
|
//
|
|
// Current 'PatchInfoBuffer' cannot hold the information, double the size
|
|
// and allocate a new buffer.
|
|
//
|
|
if (MaxPatchNumber > MAX_UINTN / 2 / sizeof (MICROCODE_PATCH_INFO)) {
|
|
//
|
|
// Overflow check for MaxPatchNumber
|
|
//
|
|
goto OnExit;
|
|
}
|
|
|
|
PatchInfoBuffer = ReallocatePool (
|
|
MaxPatchNumber * sizeof (MICROCODE_PATCH_INFO),
|
|
2 * MaxPatchNumber * sizeof (MICROCODE_PATCH_INFO),
|
|
PatchInfoBuffer
|
|
);
|
|
if (PatchInfoBuffer == NULL) {
|
|
goto OnExit;
|
|
}
|
|
MaxPatchNumber = MaxPatchNumber * 2;
|
|
}
|
|
|
|
//
|
|
// Store the information of this microcode patch
|
|
//
|
|
PatchInfoBuffer[PatchCount - 1].Address = (UINTN) MicrocodeEntryPoint;
|
|
PatchInfoBuffer[PatchCount - 1].Size = TotalSize;
|
|
TotalLoadSize += TotalSize;
|
|
}
|
|
|
|
//
|
|
// Process the next microcode patch
|
|
//
|
|
MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (((UINTN) MicrocodeEntryPoint) + TotalSize);
|
|
} while (((UINTN) MicrocodeEntryPoint < MicrocodeEnd));
|
|
|
|
if (PatchCount != 0) {
|
|
DEBUG ((
|
|
DEBUG_INFO,
|
|
"%a: 0x%x microcode patches will be loaded into memory, with size 0x%x.\n",
|
|
__FUNCTION__, PatchCount, TotalLoadSize
|
|
));
|
|
|
|
ShadowMicrocodePatchWorker (CpuMpData, PatchInfoBuffer, PatchCount, TotalLoadSize);
|
|
}
|
|
|
|
OnExit:
|
|
if (PatchInfoBuffer != NULL) {
|
|
FreePool (PatchInfoBuffer);
|
|
}
|
|
return;
|
|
}
|
|
|
|
/**
|
|
Shadow the required microcode patches data into memory.
|
|
|
|
@param[in, out] CpuMpData The pointer to CPU MP Data structure.
|
|
**/
|
|
VOID
|
|
ShadowMicrocodeUpdatePatch (
|
|
IN OUT CPU_MP_DATA *CpuMpData
|
|
)
|
|
{
|
|
EFI_STATUS Status;
|
|
|
|
Status = PlatformShadowMicrocode (CpuMpData);
|
|
if (EFI_ERROR (Status)) {
|
|
ShadowMicrocodePatchByPcd (CpuMpData);
|
|
}
|
|
}
|
|
|
|
/**
|
|
Get the cached microcode patch base address and size from the microcode patch
|
|
information cache HOB.
|
|
|
|
@param[out] Address Base address of the microcode patches data.
|
|
It will be updated if the microcode patch
|
|
information cache HOB is found.
|
|
@param[out] RegionSize Size of the microcode patches data.
|
|
It will be updated if the microcode patch
|
|
information cache HOB is found.
|
|
|
|
@retval TRUE The microcode patch information cache HOB is found.
|
|
@retval FALSE The microcode patch information cache HOB is not found.
|
|
|
|
**/
|
|
BOOLEAN
|
|
GetMicrocodePatchInfoFromHob (
|
|
UINT64 *Address,
|
|
UINT64 *RegionSize
|
|
)
|
|
{
|
|
EFI_HOB_GUID_TYPE *GuidHob;
|
|
EDKII_MICROCODE_PATCH_HOB *MicrocodePathHob;
|
|
|
|
GuidHob = GetFirstGuidHob (&gEdkiiMicrocodePatchHobGuid);
|
|
if (GuidHob == NULL) {
|
|
DEBUG((DEBUG_INFO, "%a: Microcode patch cache HOB is not found.\n", __FUNCTION__));
|
|
return FALSE;
|
|
}
|
|
|
|
MicrocodePathHob = GET_GUID_HOB_DATA (GuidHob);
|
|
|
|
*Address = MicrocodePathHob->MicrocodePatchAddress;
|
|
*RegionSize = MicrocodePathHob->MicrocodePatchRegionSize;
|
|
|
|
DEBUG((
|
|
DEBUG_INFO, "%a: MicrocodeBase = 0x%lx, MicrocodeSize = 0x%lx\n",
|
|
__FUNCTION__, *Address, *RegionSize
|
|
));
|
|
|
|
return TRUE;
|
|
}
|