REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3739 Update all use of EFI_D_* defines in DEBUG() macros to DEBUG_* defines. Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael Kubacki <michael.kubacki@microsoft.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
		
			
				
	
	
		
			545 lines
		
	
	
		
			17 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			545 lines
		
	
	
		
			17 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/** @file
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  TIS (TPM Interface Specification) functions used by TPM1.2.
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Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>
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(C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <Uefi.h>
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#include <IndustryStandard/Tpm12.h>
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#include <Library/BaseLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/IoLib.h>
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#include <Library/TimerLib.h>
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#include <Library/DebugLib.h>
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#include <Library/Tpm12CommandLib.h>
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#include <Library/PcdLib.h>
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#include <IndustryStandard/TpmPtp.h>
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#include <IndustryStandard/TpmTis.h>
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typedef enum {
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  PtpInterfaceTis,
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  PtpInterfaceFifo,
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  PtpInterfaceCrb,
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  PtpInterfaceMax,
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} PTP_INTERFACE_TYPE;
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//
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// Max TPM command/response length
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//
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#define TPMCMDBUFLENGTH             1024
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/**
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  Check whether TPM chip exist.
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  @param[in] TisReg  Pointer to TIS register.
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  @retval    TRUE    TPM chip exists.
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  @retval    FALSE   TPM chip is not found.
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**/
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BOOLEAN
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Tpm12TisPcPresenceCheck (
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  IN      TIS_PC_REGISTERS_PTR      TisReg
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  )
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{
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  UINT8                             RegRead;
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  RegRead = MmioRead8 ((UINTN)&TisReg->Access);
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  return (BOOLEAN)(RegRead != (UINT8)-1);
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}
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/**
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  Return PTP interface type.
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  @param[in] Register                Pointer to PTP register.
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  @return PTP interface type.
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**/
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PTP_INTERFACE_TYPE
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Tpm12GetPtpInterface (
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  IN VOID *Register
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  )
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{
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  PTP_CRB_INTERFACE_IDENTIFIER  InterfaceId;
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  PTP_FIFO_INTERFACE_CAPABILITY InterfaceCapability;
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  if (!Tpm12TisPcPresenceCheck (Register)) {
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    return PtpInterfaceMax;
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  }
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  //
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  // Check interface id
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  //
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  InterfaceId.Uint32 = MmioRead32 ((UINTN)&((PTP_CRB_REGISTERS *)Register)->InterfaceId);
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  InterfaceCapability.Uint32 = MmioRead32 ((UINTN)&((PTP_FIFO_REGISTERS *)Register)->InterfaceCapability);
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  if ((InterfaceId.Bits.InterfaceType == PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_CRB) &&
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      (InterfaceId.Bits.InterfaceVersion == PTP_INTERFACE_IDENTIFIER_INTERFACE_VERSION_CRB) &&
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      (InterfaceId.Bits.CapCRB != 0)) {
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    return PtpInterfaceCrb;
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  }
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  if ((InterfaceId.Bits.InterfaceType == PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_FIFO) &&
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      (InterfaceId.Bits.InterfaceVersion == PTP_INTERFACE_IDENTIFIER_INTERFACE_VERSION_FIFO) &&
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      (InterfaceId.Bits.CapFIFO != 0) &&
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      (InterfaceCapability.Bits.InterfaceVersion == INTERFACE_CAPABILITY_INTERFACE_VERSION_PTP)) {
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    return PtpInterfaceFifo;
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  }
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  return PtpInterfaceTis;
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}
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/**
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  Check whether the value of a TPM chip register satisfies the input BIT setting.
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  @param[in]  Register     Address port of register to be checked.
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  @param[in]  BitSet       Check these data bits are set.
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  @param[in]  BitClear     Check these data bits are clear.
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  @param[in]  TimeOut      The max wait time (unit MicroSecond) when checking register.
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  @retval     EFI_SUCCESS  The register satisfies the check bit.
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  @retval     EFI_TIMEOUT  The register can't run into the expected status in time.
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**/
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EFI_STATUS
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Tpm12TisPcWaitRegisterBits (
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  IN      UINT8                     *Register,
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  IN      UINT8                     BitSet,
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  IN      UINT8                     BitClear,
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  IN      UINT32                    TimeOut
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  )
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{
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  UINT8                             RegRead;
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  UINT32                            WaitTime;
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  for (WaitTime = 0; WaitTime < TimeOut; WaitTime += 30){
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    RegRead = MmioRead8 ((UINTN)Register);
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    if ((RegRead & BitSet) == BitSet && (RegRead & BitClear) == 0)
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      return EFI_SUCCESS;
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    MicroSecondDelay (30);
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  }
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  return EFI_TIMEOUT;
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}
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/**
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  Get BurstCount by reading the burstCount field of a TIS register
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  in the time of default TIS_TIMEOUT_D.
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  @param[in]  TisReg                Pointer to TIS register.
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  @param[out] BurstCount            Pointer to a buffer to store the got BurstCount.
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  @retval     EFI_SUCCESS           Get BurstCount.
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  @retval     EFI_INVALID_PARAMETER TisReg is NULL or BurstCount is NULL.
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  @retval     EFI_TIMEOUT           BurstCount can't be got in time.
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**/
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EFI_STATUS
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Tpm12TisPcReadBurstCount (
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  IN      TIS_PC_REGISTERS_PTR      TisReg,
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     OUT  UINT16                    *BurstCount
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  )
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{
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  UINT32                            WaitTime;
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  UINT8                             DataByte0;
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  UINT8                             DataByte1;
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  if (BurstCount == NULL || TisReg == NULL) {
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    return EFI_INVALID_PARAMETER;
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  }
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  WaitTime = 0;
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  do {
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    //
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    // TIS_PC_REGISTERS_PTR->burstCount is UINT16, but it is not 2bytes aligned,
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    // so it needs to use MmioRead8 to read two times
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    //
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    DataByte0   = MmioRead8 ((UINTN)&TisReg->BurstCount);
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    DataByte1   = MmioRead8 ((UINTN)&TisReg->BurstCount + 1);
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    *BurstCount = (UINT16)((DataByte1 << 8) + DataByte0);
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    if (*BurstCount != 0) {
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      return EFI_SUCCESS;
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    }
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    MicroSecondDelay (30);
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    WaitTime += 30;
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  } while (WaitTime < TIS_TIMEOUT_D);
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  return EFI_TIMEOUT;
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}
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/**
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  Set TPM chip to ready state by sending ready command TIS_PC_STS_READY
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  to Status Register in time.
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  @param[in] TisReg                Pointer to TIS register.
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  @retval    EFI_SUCCESS           TPM chip enters into ready state.
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  @retval    EFI_INVALID_PARAMETER TisReg is NULL.
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  @retval    EFI_TIMEOUT           TPM chip can't be set to ready state in time.
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**/
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EFI_STATUS
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Tpm12TisPcPrepareCommand (
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  IN      TIS_PC_REGISTERS_PTR      TisReg
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  )
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{
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  EFI_STATUS                        Status;
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  if (TisReg == NULL) {
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    return EFI_INVALID_PARAMETER;
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  }
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  MmioWrite8((UINTN)&TisReg->Status, TIS_PC_STS_READY);
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  Status = Tpm12TisPcWaitRegisterBits (
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             &TisReg->Status,
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             TIS_PC_STS_READY,
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             0,
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             TIS_TIMEOUT_B
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             );
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  return Status;
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}
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/**
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  Get the control of TPM chip by sending requestUse command TIS_PC_ACC_RQUUSE
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  to ACCESS Register in the time of default TIS_TIMEOUT_A.
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  @param[in] TisReg                Pointer to TIS register.
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  @retval    EFI_SUCCESS           Get the control of TPM chip.
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  @retval    EFI_INVALID_PARAMETER TisReg is NULL.
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  @retval    EFI_NOT_FOUND         TPM chip doesn't exit.
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  @retval    EFI_TIMEOUT           Can't get the TPM control in time.
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**/
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EFI_STATUS
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Tpm12TisPcRequestUseTpm (
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  IN      TIS_PC_REGISTERS_PTR      TisReg
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  )
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{
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  EFI_STATUS                        Status;
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  if (TisReg == NULL) {
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    return EFI_INVALID_PARAMETER;
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  }
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  if (!Tpm12TisPcPresenceCheck (TisReg)) {
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    return EFI_NOT_FOUND;
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  }
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  MmioWrite8((UINTN)&TisReg->Access, TIS_PC_ACC_RQUUSE);
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  Status = Tpm12TisPcWaitRegisterBits (
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             &TisReg->Access,
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             (UINT8)(TIS_PC_ACC_ACTIVE |TIS_PC_VALID),
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             0,
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             TIS_TIMEOUT_A
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             );
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  return Status;
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}
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/**
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  Send a command to TPM for execution and return response data.
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  @param[in]      TisReg        TPM register space base address.
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  @param[in]      BufferIn      Buffer for command data.
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  @param[in]      SizeIn        Size of command data.
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  @param[in, out] BufferOut     Buffer for response data.
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  @param[in, out] SizeOut       Size of response data.
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  @retval EFI_SUCCESS           Operation completed successfully.
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  @retval EFI_BUFFER_TOO_SMALL  Response data buffer is too small.
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  @retval EFI_DEVICE_ERROR      Unexpected device behavior.
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  @retval EFI_UNSUPPORTED       Unsupported TPM version
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**/
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EFI_STATUS
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Tpm12TisTpmCommand (
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  IN     TIS_PC_REGISTERS_PTR       TisReg,
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  IN     UINT8                      *BufferIn,
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  IN     UINT32                     SizeIn,
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  IN OUT UINT8                      *BufferOut,
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  IN OUT UINT32                     *SizeOut
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  )
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{
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  EFI_STATUS                        Status;
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  UINT16                            BurstCount;
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  UINT32                            Index;
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  UINT32                            TpmOutSize;
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  UINT16                            Data16;
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  UINT32                            Data32;
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  UINT16                            RspTag;
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  DEBUG_CODE (
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    UINTN  DebugSize;
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    DEBUG ((DEBUG_VERBOSE, "Tpm12TisTpmCommand Send - "));
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    if (SizeIn > 0x100) {
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      DebugSize = 0x40;
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    } else {
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      DebugSize = SizeIn;
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    }
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    for (Index = 0; Index < DebugSize; Index++) {
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      DEBUG ((DEBUG_VERBOSE, "%02x ", BufferIn[Index]));
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    }
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    if (DebugSize != SizeIn) {
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      DEBUG ((DEBUG_VERBOSE, "...... "));
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      for (Index = SizeIn - 0x20; Index < SizeIn; Index++) {
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        DEBUG ((DEBUG_VERBOSE, "%02x ", BufferIn[Index]));
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      }
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    }
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    DEBUG ((DEBUG_VERBOSE, "\n"));
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  );
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  TpmOutSize = 0;
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  Status = Tpm12TisPcPrepareCommand (TisReg);
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  if (EFI_ERROR (Status)){
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    DEBUG ((DEBUG_ERROR, "Tpm12 is not ready for command!\n"));
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    return EFI_DEVICE_ERROR;
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  }
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  //
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  // Send the command data to Tpm
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  //
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  Index = 0;
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  while (Index < SizeIn) {
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    Status = Tpm12TisPcReadBurstCount (TisReg, &BurstCount);
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    if (EFI_ERROR (Status)) {
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      Status = EFI_DEVICE_ERROR;
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      goto Exit;
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    }
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    for (; BurstCount > 0 && Index < SizeIn; BurstCount--) {
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      MmioWrite8((UINTN)&TisReg->DataFifo, *(BufferIn + Index));
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      Index++;
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    }
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  }
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  //
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  // Check the Tpm status STS_EXPECT change from 1 to 0
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  //
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  Status = Tpm12TisPcWaitRegisterBits (
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             &TisReg->Status,
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             (UINT8) TIS_PC_VALID,
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             TIS_PC_STS_EXPECT,
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             TIS_TIMEOUT_C
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             );
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  if (EFI_ERROR (Status)) {
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    DEBUG ((DEBUG_ERROR, "Tpm12 The send buffer too small!\n"));
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    Status = EFI_BUFFER_TOO_SMALL;
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    goto Exit;
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  }
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  //
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  // Executed the TPM command and waiting for the response data ready
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  //
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  MmioWrite8((UINTN)&TisReg->Status, TIS_PC_STS_GO);
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  Status = Tpm12TisPcWaitRegisterBits (
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             &TisReg->Status,
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             (UINT8) (TIS_PC_VALID | TIS_PC_STS_DATA),
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             0,
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             TIS_TIMEOUT_B
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             );
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  if (EFI_ERROR (Status)) {
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    DEBUG ((DEBUG_ERROR, "Wait for Tpm12 response data time out!!\n"));
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    Status = EFI_DEVICE_ERROR;
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    goto Exit;
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  }
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  //
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  // Get response data header
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  //
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  Index = 0;
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  BurstCount = 0;
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  while (Index < sizeof (TPM_RSP_COMMAND_HDR)) {
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    Status = Tpm12TisPcReadBurstCount (TisReg, &BurstCount);
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    if (EFI_ERROR (Status)) {
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      Status = EFI_DEVICE_ERROR;
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      goto Exit;
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    }
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    for (; BurstCount > 0; BurstCount--) {
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      *(BufferOut + Index) = MmioRead8 ((UINTN)&TisReg->DataFifo);
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      Index++;
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      if (Index == sizeof (TPM_RSP_COMMAND_HDR)) break;
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    }
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  }
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  DEBUG_CODE (
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    DEBUG ((DEBUG_VERBOSE, "Tpm12TisTpmCommand ReceiveHeader - "));
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    for (Index = 0; Index < sizeof (TPM_RSP_COMMAND_HDR); Index++) {
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      DEBUG ((DEBUG_VERBOSE, "%02x ", BufferOut[Index]));
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    }
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    DEBUG ((DEBUG_VERBOSE, "\n"));
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  );
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  //
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  // Check the response data header (tag, parasize and returncode)
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  //
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  CopyMem (&Data16, BufferOut, sizeof (UINT16));
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  RspTag = SwapBytes16 (Data16);
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  if (RspTag != TPM_TAG_RSP_COMMAND && RspTag != TPM_TAG_RSP_AUTH1_COMMAND && RspTag != TPM_TAG_RSP_AUTH2_COMMAND) {
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    DEBUG ((DEBUG_ERROR, "TPM12: Response tag error - current tag value is %x\n", RspTag));
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    Status = EFI_UNSUPPORTED;
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    goto Exit;
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  }
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  CopyMem (&Data32, (BufferOut + 2), sizeof (UINT32));
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  TpmOutSize  = SwapBytes32 (Data32);
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  if (*SizeOut < TpmOutSize) {
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    Status = EFI_BUFFER_TOO_SMALL;
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    goto Exit;
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  }
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  *SizeOut = TpmOutSize;
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  //
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  // Continue reading the remaining data
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  //
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  while ( Index < TpmOutSize ) {
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    for (; BurstCount > 0; BurstCount--) {
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      *(BufferOut + Index) = MmioRead8 ((UINTN)&TisReg->DataFifo);
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      Index++;
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      if (Index == TpmOutSize) {
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        Status = EFI_SUCCESS;
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        goto Exit;
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      }
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    }
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    Status = Tpm12TisPcReadBurstCount (TisReg, &BurstCount);
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    if (EFI_ERROR (Status)) {
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      Status = EFI_DEVICE_ERROR;
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      goto Exit;
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    }
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  }
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Exit:
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  DEBUG_CODE (
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    DEBUG ((DEBUG_VERBOSE, "Tpm12TisTpmCommand Receive - "));
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    for (Index = 0; Index < TpmOutSize; Index++) {
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      DEBUG ((DEBUG_VERBOSE, "%02x ", BufferOut[Index]));
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    }
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    DEBUG ((DEBUG_VERBOSE, "\n"));
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  );
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  MmioWrite8((UINTN)&TisReg->Status, TIS_PC_STS_READY);
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  return Status;
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}
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/**
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  This service enables the sending of commands to the TPM12.
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 | 
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  @param[in]      InputParameterBlockSize  Size of the TPM12 input parameter block.
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  @param[in]      InputParameterBlock      Pointer to the TPM12 input parameter block.
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  @param[in,out]  OutputParameterBlockSize Size of the TPM12 output parameter block.
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  @param[in]      OutputParameterBlock     Pointer to the TPM12 output parameter block.
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  @retval EFI_SUCCESS            The command byte stream was successfully sent to the device and a response was successfully received.
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  @retval EFI_DEVICE_ERROR       The command was not successfully sent to the device or a response was not successfully received from the device.
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  @retval EFI_BUFFER_TOO_SMALL   The output parameter block is too small.
 | 
						|
**/
 | 
						|
EFI_STATUS
 | 
						|
EFIAPI
 | 
						|
Tpm12SubmitCommand (
 | 
						|
  IN UINT32            InputParameterBlockSize,
 | 
						|
  IN UINT8             *InputParameterBlock,
 | 
						|
  IN OUT UINT32        *OutputParameterBlockSize,
 | 
						|
  IN UINT8             *OutputParameterBlock
 | 
						|
  )
 | 
						|
{
 | 
						|
  PTP_INTERFACE_TYPE  PtpInterface;
 | 
						|
 | 
						|
  //
 | 
						|
  // Special handle for TPM1.2 to check PTP too, because PTP/TIS share same register address.
 | 
						|
  //
 | 
						|
  PtpInterface = Tpm12GetPtpInterface ((VOID *) (UINTN) PcdGet64 (PcdTpmBaseAddress));
 | 
						|
  switch (PtpInterface) {
 | 
						|
  case PtpInterfaceFifo:
 | 
						|
  case PtpInterfaceTis:
 | 
						|
    return Tpm12TisTpmCommand (
 | 
						|
             (TIS_PC_REGISTERS_PTR) (UINTN) PcdGet64 (PcdTpmBaseAddress),
 | 
						|
             InputParameterBlock,
 | 
						|
             InputParameterBlockSize,
 | 
						|
             OutputParameterBlock,
 | 
						|
             OutputParameterBlockSize
 | 
						|
             );
 | 
						|
  case PtpInterfaceCrb:
 | 
						|
    //
 | 
						|
    // No need to support CRB because it is only accept TPM2 command.
 | 
						|
    //
 | 
						|
  default:
 | 
						|
    return EFI_DEVICE_ERROR;
 | 
						|
  }
 | 
						|
 | 
						|
}
 | 
						|
 | 
						|
/**
 | 
						|
  Check whether the value of a TPM chip register satisfies the input BIT setting.
 | 
						|
 | 
						|
  @param[in]  Register     Address port of register to be checked.
 | 
						|
  @param[in]  BitSet       Check these data bits are set.
 | 
						|
  @param[in]  BitClear     Check these data bits are clear.
 | 
						|
  @param[in]  TimeOut      The max wait time (unit MicroSecond) when checking register.
 | 
						|
 | 
						|
  @retval     EFI_SUCCESS  The register satisfies the check bit.
 | 
						|
  @retval     EFI_TIMEOUT  The register can't run into the expected status in time.
 | 
						|
**/
 | 
						|
EFI_STATUS
 | 
						|
Tpm12PtpCrbWaitRegisterBits (
 | 
						|
  IN      UINT32                    *Register,
 | 
						|
  IN      UINT32                    BitSet,
 | 
						|
  IN      UINT32                    BitClear,
 | 
						|
  IN      UINT32                    TimeOut
 | 
						|
  )
 | 
						|
{
 | 
						|
  UINT32                            RegRead;
 | 
						|
  UINT32                            WaitTime;
 | 
						|
 | 
						|
  for (WaitTime = 0; WaitTime < TimeOut; WaitTime += 30){
 | 
						|
    RegRead = MmioRead32 ((UINTN)Register);
 | 
						|
    if ((RegRead & BitSet) == BitSet && (RegRead & BitClear) == 0) {
 | 
						|
      return EFI_SUCCESS;
 | 
						|
    }
 | 
						|
    MicroSecondDelay (30);
 | 
						|
  }
 | 
						|
  return EFI_TIMEOUT;
 | 
						|
}
 | 
						|
 | 
						|
/**
 | 
						|
  Get the control of TPM chip.
 | 
						|
 | 
						|
  @param[in] CrbReg                Pointer to CRB register.
 | 
						|
 | 
						|
  @retval    EFI_SUCCESS           Get the control of TPM chip.
 | 
						|
  @retval    EFI_INVALID_PARAMETER CrbReg is NULL.
 | 
						|
  @retval    EFI_NOT_FOUND         TPM chip doesn't exit.
 | 
						|
  @retval    EFI_TIMEOUT           Can't get the TPM control in time.
 | 
						|
**/
 | 
						|
EFI_STATUS
 | 
						|
Tpm12PtpCrbRequestUseTpm (
 | 
						|
  IN      PTP_CRB_REGISTERS_PTR      CrbReg
 | 
						|
  )
 | 
						|
{
 | 
						|
  EFI_STATUS                        Status;
 | 
						|
 | 
						|
  MmioWrite32((UINTN)&CrbReg->LocalityControl, PTP_CRB_LOCALITY_CONTROL_REQUEST_ACCESS);
 | 
						|
  Status = Tpm12PtpCrbWaitRegisterBits (
 | 
						|
             &CrbReg->LocalityStatus,
 | 
						|
             PTP_CRB_LOCALITY_STATUS_GRANTED,
 | 
						|
             0,
 | 
						|
             PTP_TIMEOUT_A
 | 
						|
             );
 | 
						|
  return Status;
 | 
						|
}
 | 
						|
 | 
						|
/**
 | 
						|
  This service requests use TPM12.
 | 
						|
 | 
						|
  @retval EFI_SUCCESS      Get the control of TPM12 chip.
 | 
						|
  @retval EFI_NOT_FOUND    TPM12 not found.
 | 
						|
  @retval EFI_DEVICE_ERROR Unexpected device behavior.
 | 
						|
**/
 | 
						|
EFI_STATUS
 | 
						|
EFIAPI
 | 
						|
Tpm12RequestUseTpm (
 | 
						|
  VOID
 | 
						|
  )
 | 
						|
{
 | 
						|
  PTP_INTERFACE_TYPE  PtpInterface;
 | 
						|
 | 
						|
  //
 | 
						|
  // Special handle for TPM1.2 to check PTP too, because PTP/TIS share same register address.
 | 
						|
  // Some other program might leverage this function to check the existence of TPM chip.
 | 
						|
  //
 | 
						|
  PtpInterface = Tpm12GetPtpInterface ((VOID *) (UINTN) PcdGet64 (PcdTpmBaseAddress));
 | 
						|
  switch (PtpInterface) {
 | 
						|
  case PtpInterfaceCrb:
 | 
						|
    return Tpm12PtpCrbRequestUseTpm ((PTP_CRB_REGISTERS_PTR) (UINTN) PcdGet64 (PcdTpmBaseAddress));
 | 
						|
  case PtpInterfaceFifo:
 | 
						|
  case PtpInterfaceTis:
 | 
						|
    return Tpm12TisPcRequestUseTpm ((TIS_PC_REGISTERS_PTR) (UINTN) PcdGet64 (PcdTpmBaseAddress));
 | 
						|
  default:
 | 
						|
    return EFI_NOT_FOUND;
 | 
						|
  }
 | 
						|
}
 |