https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
67 lines
1.3 KiB
C
67 lines
1.3 KiB
C
/** @file
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HTE handling routines for MRC use.
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Copyright (c) 2013-2015 Intel Corporation.
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef __HTE_H
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#define __HTE_H
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#define STATIC static
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#define VOID void
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#if !defined(__GNUC__) && (__STDC_VERSION__ < 199901L)
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typedef uint32_t UINT32;
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typedef uint16_t UINT16;
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typedef uint8_t UINT8;
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#endif
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typedef enum
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{
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MrcNoHaltSystemOnError,
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MrcHaltSystemOnError,
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MrcHaltHteEngineOnError,
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MrcNoHaltHteEngineOnError
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} HALT_TYPE;
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typedef enum
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{
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MrcMemInit, MrcMemTest
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} MEM_INIT_OR_TEST;
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#define READ_TRAIN 1
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#define WRITE_TRAIN 2
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#define HTE_MEMTEST_NUM 2
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#define HTE_LOOP_CNT 5 // EXP_LOOP_CNT field of HTE_CMD_CTL. This CANNOT be less than 4
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#define HTE_LFSR_VICTIM_SEED 0xF294BA21 // Random seed for victim.
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#define HTE_LFSR_AGRESSOR_SEED 0xEBA7492D // Random seed for aggressor.
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UINT32
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HteMemInit(
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MRC_PARAMS *CurrentMrcData,
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UINT8 MemInitFlag,
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UINT8 HaltHteEngineOnError);
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UINT16
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BasicWriteReadHTE(
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MRC_PARAMS *CurrentMrcData,
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UINT32 Address,
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UINT8 FirstRun,
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UINT8 Mode);
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UINT16
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WriteStressBitLanesHTE(
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MRC_PARAMS *CurrentMrcData,
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UINT32 Address,
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UINT8 FirstRun);
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VOID
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HteMemOp(
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UINT32 Address,
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UINT8 FirstRun,
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UINT8 IsWrite);
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#endif
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