8659306a2e
The existing HardwareInterrupt protocol lacked a means to configure the level/edge properties of an interrupt. The new HardwareInterrupt2 protocol introduced this capability. This patch updates the GIC drivers to provide the new interfaces. The changes comprise: Update to use HardwareInterrupt2 protocol Additions to register info in ArmGicLib.h Added new functionality (GetTriggerType and SetTriggerType) The requirement for this change derives from a problem detected on ARM Juno boards, but the change is of generic (ARM) relevance. This commit is in response to review on the mailing list and, as suggested there, rolls Girish's updates onto Ard's original example. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Girish Pathak <girish.pathak@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Tested-by: Girish Pathak <girish.pathak@arm.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
85 lines
2.4 KiB
C
85 lines
2.4 KiB
C
/*++
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Copyright (c) 2013-2017, ARM Ltd. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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--*/
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#ifndef __ARM_GIC_DXE_H__
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#define __ARM_GIC_DXE_H__
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#include <Library/ArmGicLib.h>
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#include <Library/ArmLib.h>
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#include <Library/DebugLib.h>
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#include <Library/IoLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Library/UefiBootServicesTableLib.h>
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#include <Protocol/Cpu.h>
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#include <Protocol/HardwareInterrupt.h>
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#include <Protocol/HardwareInterrupt2.h>
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extern UINTN mGicNumInterrupts;
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extern HARDWARE_INTERRUPT_HANDLER *gRegisteredInterruptHandlers;
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// Common API
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EFI_STATUS
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InstallAndRegisterInterruptService (
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IN EFI_HARDWARE_INTERRUPT_PROTOCOL *InterruptProtocol,
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IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *Interrupt2Protocol,
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IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler,
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IN EFI_EVENT_NOTIFY ExitBootServicesEvent
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);
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EFI_STATUS
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EFIAPI
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RegisterInterruptSource (
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IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,
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IN HARDWARE_INTERRUPT_SOURCE Source,
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IN HARDWARE_INTERRUPT_HANDLER Handler
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);
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// GicV2 API
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EFI_STATUS
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GicV2DxeInitialize (
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IN EFI_HANDLE ImageHandle,
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IN EFI_SYSTEM_TABLE *SystemTable
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);
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// GicV3 API
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EFI_STATUS
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GicV3DxeInitialize (
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IN EFI_HANDLE ImageHandle,
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IN EFI_SYSTEM_TABLE *SystemTable
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);
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// Shared code
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/**
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Calculate GICD_ICFGRn base address and corresponding bit
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field Int_config[1] of the GIC distributor register.
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@param Source Hardware source of the interrupt.
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@param RegAddress Corresponding GICD_ICFGRn base address.
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@param Config1Bit Bit number of F Int_config[1] bit in the register.
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@retval EFI_SUCCESS Source interrupt supported.
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@retval EFI_UNSUPPORTED Source interrupt is not supported.
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**/
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EFI_STATUS
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GicGetDistributorIcfgBaseAndBit (
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IN HARDWARE_INTERRUPT_SOURCE Source,
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OUT UINTN *RegAddress,
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OUT UINTN *Config1Bit
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);
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#endif
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