33ed33f187
In the function ArmGicEnableDistributor (), the Affinity Routing Enable (ARE) bit, which essentially defines whether the GIC runs in v2 or v3 mode, is inadvertently cleared when enabling the GIC distributor if it is running in v3 mode. So fix that. Reported-by: Supreeth Venkatesh <Supreeth.Venkatesh@arm.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19274 6f19259b-4bc3-4df7-8a09-765794883524
42 lines
1.2 KiB
C
42 lines
1.2 KiB
C
/** @file
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*
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* Copyright (c) 2011-2015, ARM Limited. All rights reserved.
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*
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* This program and the accompanying materials
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* are licensed and made available under the terms and conditions of the BSD License
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* which accompanies this distribution. The full text of the license may be found at
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* http://opensource.org/licenses/bsd-license.php
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*
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* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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*
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**/
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#include <Uefi.h>
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#include <Library/IoLib.h>
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#include <Library/ArmGicLib.h>
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VOID
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EFIAPI
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ArmGicEnableDistributor (
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IN INTN GicDistributorBase
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)
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{
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ARM_GIC_ARCH_REVISION Revision;
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/*
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* Enable GIC distributor in Non-Secure world.
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* Note: The ICDDCR register is banked when Security extensions are implemented
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*/
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Revision = ArmGicGetSupportedArchRevision ();
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if (Revision == ARM_GIC_ARCH_REVISION_2) {
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MmioWrite32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x1);
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} else {
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if (MmioRead32 (GicDistributorBase + ARM_GIC_ICDDCR) & ARM_GIC_ICDDCR_ARE) {
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MmioOr32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x2);
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} else {
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MmioOr32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x1);
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}
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}
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}
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