Changes for V4 ============== 1) Move delete of QuarkSocPkg\QuarkNorthCluster\Binary\QuarkMicrocode from QuarkPlatformPkg commit to QuarkSocPkg commit 2) Fix incorrect license header in PlatformSecLibModStrs.uni Changes for V3 ============== 1) Set PcdResetOnMemoryTypeInformationChange FALSE in QuarkMin.dsc This is required because QuarkMin.dsc uses the emulated variable driver that does not preserve any non-volatile UEFI variables across reset. If the condition is met where the memory type information variable needs to be updated, then the system will reset every time the UEFI Shell is run. By setting this PCD to FALSE, then reset action is disabled. 2) Move one binary file to QuarkSocBinPkg 3) Change RMU.bin FILE statements to INF statement in DSC FD region to be compatible with PACKAGES_PATH search for QuarkSocBinPkg Changes for V2 ============== 1) Use new generic PCI serial driver PciSioSerialDxe in MdeModulePkg 2) Configure PcdPciSerialParameters for PCI serial driver for Quark 3) Use new MtrrLib API to reduce time to set MTRRs for all DRAM 4) Convert all UNI files to utf-8 5) Replace tabs with spaces and remove trailing spaces 6) Add License.txt Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Acked-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19287 6f19259b-4bc3-4df7-8a09-765794883524
201 lines
5.4 KiB
C
201 lines
5.4 KiB
C
/** @file
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Registers onboard PCI ROMs with PCI.IO
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Copyright (c) 2013-2015 Intel Corporation.
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include "CommonHeader.h"
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#include "PciPlatform.h"
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PCI_OPTION_ROM_TABLE mPciOptionRomTable[] = {
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{ NULL_ROM_FILE_GUID, 0, 0, 0, 0, 0xffff, 0xffff }
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};
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EFI_PCI_PLATFORM_PROTOCOL mPciPlatform = {
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PhaseNotify,
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PlatformPrepController,
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GetPlatformPolicy,
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GetPciRom
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};
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EFI_HANDLE mPciPlatformHandle = NULL;
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EFI_HANDLE mImageHandle = NULL;
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EFI_STATUS
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PhaseNotify (
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IN EFI_PCI_PLATFORM_PROTOCOL *This,
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IN EFI_HANDLE HostBridge,
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IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase,
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IN EFI_PCI_CHIPSET_EXECUTION_PHASE ChipsetPhase
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)
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{
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UINT8 UsbHostBusNumber = IOH_BUS;
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if (Phase == EfiPciHostBridgeEndResourceAllocation) {
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// Required for QuarkSouthCluster.
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// Enable USB controller memory, io and bus master before Ehci driver.
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EnableUsbMemIoBusMaster (UsbHostBusNumber);
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return EFI_SUCCESS;
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}
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return EFI_UNSUPPORTED;
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}
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EFI_STATUS
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PlatformPrepController (
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IN EFI_PCI_PLATFORM_PROTOCOL *This,
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IN EFI_HANDLE HostBridge,
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IN EFI_HANDLE RootBridge,
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IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,
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IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase,
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IN EFI_PCI_CHIPSET_EXECUTION_PHASE ChipsetPhase
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)
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{
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return EFI_UNSUPPORTED;
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}
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EFI_STATUS
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GetPlatformPolicy (
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IN CONST EFI_PCI_PLATFORM_PROTOCOL *This,
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OUT EFI_PCI_PLATFORM_POLICY *PciPolicy
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)
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{
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if (PciPolicy == NULL) {
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return EFI_INVALID_PARAMETER;
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}
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return EFI_UNSUPPORTED;
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}
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EFI_STATUS
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GetPciRom (
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IN CONST EFI_PCI_PLATFORM_PROTOCOL *This,
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IN EFI_HANDLE PciHandle,
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OUT VOID **RomImage,
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OUT UINTN *RomSize
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)
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/*++
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Routine Description:
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Return a PCI ROM image for the onboard device represented by PciHandle
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Arguments:
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This - Protocol instance pointer.
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PciHandle - PCI device to return the ROM image for.
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RomImage - PCI Rom Image for onboard device
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RomSize - Size of RomImage in bytes
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Returns:
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EFI_SUCCESS - RomImage is valid
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EFI_NOT_FOUND - No RomImage
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--*/
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{
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EFI_STATUS Status;
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EFI_PCI_IO_PROTOCOL *PciIo;
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UINTN Segment;
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UINTN Bus;
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UINTN Device;
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UINTN Function;
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UINT16 VendorId;
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UINT16 DeviceId;
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UINT16 DeviceClass;
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UINTN TableIndex;
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Status = gBS->HandleProtocol (
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PciHandle,
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&gEfiPciIoProtocolGuid,
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(VOID **) &PciIo
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);
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if (EFI_ERROR (Status)) {
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return EFI_NOT_FOUND;
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}
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PciIo->GetLocation (PciIo, &Segment, &Bus, &Device, &Function);
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PciIo->Pci.Read (PciIo, EfiPciIoWidthUint16, 0x0A, 1, &DeviceClass);
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PciIo->Pci.Read (PciIo, EfiPciIoWidthUint16, 0, 1, &VendorId);
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PciIo->Pci.Read (PciIo, EfiPciIoWidthUint16, 2, 1, &DeviceId);
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//
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// Loop through table of video option rom descriptions
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//
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for (TableIndex = 0; mPciOptionRomTable[TableIndex].VendorId != 0xffff; TableIndex++) {
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//
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// See if the PCI device specified by PciHandle matches at device in mPciOptionRomTable
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//
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if (VendorId != mPciOptionRomTable[TableIndex].VendorId ||
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DeviceId != mPciOptionRomTable[TableIndex].DeviceId ||
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Segment != mPciOptionRomTable[TableIndex].Segment ||
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Bus != mPciOptionRomTable[TableIndex].Bus ||
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Device != mPciOptionRomTable[TableIndex].Device ||
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Function != mPciOptionRomTable[TableIndex].Function) {
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continue;
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}
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Status = GetSectionFromFv (
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&mPciOptionRomTable[TableIndex].FileName,
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EFI_SECTION_RAW,
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0,
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RomImage,
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RomSize
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);
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if (EFI_ERROR (Status)) {
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continue;
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}
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return EFI_SUCCESS;
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}
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return EFI_NOT_FOUND;
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}
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EFI_STATUS
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PciPlatformDriverEntry (
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IN EFI_HANDLE ImageHandle,
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IN EFI_SYSTEM_TABLE *SystemTable
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)
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/*++
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Routine Description:
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Arguments:
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(Standard EFI Image entry - EFI_IMAGE_ENTRY_POINT)
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Returns:
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EFI_STATUS
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--*/
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{
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EFI_STATUS Status;
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mImageHandle = ImageHandle;
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//
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// Install on a new handle
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//
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Status = gBS->InstallProtocolInterface (
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&mPciPlatformHandle,
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&gEfiPciPlatformProtocolGuid,
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EFI_NATIVE_INTERFACE,
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&mPciPlatform
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);
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return Status;
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}
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