b303605e1b
Changes for V4 ============== 1) Move delete of QuarkSocPkg\QuarkNorthCluster\Binary\QuarkMicrocode from QuarkPlatformPkg commit to QuarkSocPkg commit 2) Fix incorrect license header in PlatformSecLibModStrs.uni Changes for V3 ============== 1) Set PcdResetOnMemoryTypeInformationChange FALSE in QuarkMin.dsc This is required because QuarkMin.dsc uses the emulated variable driver that does not preserve any non-volatile UEFI variables across reset. If the condition is met where the memory type information variable needs to be updated, then the system will reset every time the UEFI Shell is run. By setting this PCD to FALSE, then reset action is disabled. 2) Move one binary file to QuarkSocBinPkg 3) Change RMU.bin FILE statements to INF statement in DSC FD region to be compatible with PACKAGES_PATH search for QuarkSocBinPkg Changes for V2 ============== 1) Use new generic PCI serial driver PciSioSerialDxe in MdeModulePkg 2) Configure PcdPciSerialParameters for PCI serial driver for Quark 3) Use new MtrrLib API to reduce time to set MTRRs for all DRAM 4) Convert all UNI files to utf-8 5) Replace tabs with spaces and remove trailing spaces 6) Add License.txt Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Acked-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19287 6f19259b-4bc3-4df7-8a09-765794883524
89 lines
2.7 KiB
C
89 lines
2.7 KiB
C
/** @file
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This code supports a the private implementation
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of the Legacy BIOS Platform protocol
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Copyright (c) 2013-2015 Intel Corporation.
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef PCI_PLATFORM_H_
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#define PCI_PLATFORM_H_
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#include <IndustryStandard/Pci.h>
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#include <Library/PcdLib.h>
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//
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// Global variables for Option ROMs
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//
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#define NULL_ROM_FILE_GUID \
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{ 0x00000000, 0x0000, 0x0000, {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }}
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#define ONBOARD_VIDEO_OPTION_ROM_FILE_GUID \
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{ 0x8dfae5d4, 0xb50e, 0x4c10, {0x96, 0xe6, 0xf2, 0xc2, 0x66, 0xca, 0xcb, 0xb6 }}
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#define IDE_RAID_OPTION_ROM_FILE_GUID \
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{ 0x3392A8E1, 0x1881, 0x4398, {0x83, 0xa6, 0x53, 0xd3, 0x87, 0xdb, 0x20, 0x20 }}
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#define TANX_UNDI_OPTION_ROM_FILE_GUID \
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{ 0x84c24ab0, 0x124e, 0x4aed, {0x8e, 0xfe, 0xf9, 0x1b, 0xb9, 0x73, 0x69, 0xf4 }}
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#define PXE_UNDI_OPTION_ROM_FILE_GUID \
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{ 0xea34cd48, 0x5fdf, 0x46f0, {0xb5, 0xfa, 0xeb, 0xe0, 0x76, 0xa4, 0xf1, 0x2c }}
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typedef struct {
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EFI_GUID FileName;
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UINTN Segment;
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UINTN Bus;
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UINTN Device;
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UINTN Function;
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UINT16 VendorId;
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UINT16 DeviceId;
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} PCI_OPTION_ROM_TABLE;
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EFI_STATUS
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PhaseNotify (
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IN EFI_PCI_PLATFORM_PROTOCOL *This,
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IN EFI_HANDLE HostBridge,
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IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase,
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IN EFI_PCI_CHIPSET_EXECUTION_PHASE ChipsetPhase
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);
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EFI_STATUS
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PlatformPrepController (
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IN EFI_PCI_PLATFORM_PROTOCOL *This,
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IN EFI_HANDLE HostBridge,
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IN EFI_HANDLE RootBridge,
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IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,
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IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase,
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IN EFI_PCI_CHIPSET_EXECUTION_PHASE ChipsetPhase
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);
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EFI_STATUS
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GetPlatformPolicy (
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IN CONST EFI_PCI_PLATFORM_PROTOCOL *This,
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OUT EFI_PCI_PLATFORM_POLICY *PciPolicy
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);
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EFI_STATUS
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GetPciRom (
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IN CONST EFI_PCI_PLATFORM_PROTOCOL *This,
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IN EFI_HANDLE PciHandle,
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OUT VOID **RomImage,
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OUT UINTN *RomSize
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);
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#endif
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