9b6bbcdbfd
Changes for V4 ============== 1) Remove Unicode character from C source file 2) Move delete of QuarkSocPkg\QuarkNorthCluster\Binary\QuarkMicrocode from QuarkPlatformPkg commit to QuarkSocPkg commit Changes for V2 ============== 1) Sync with new APIs in SmmCpuFeaturesLib class 2) Use new generic PCI serial driver PciSioSerialDxe in MdeModulePkg 3) Remove PCI serial driver from QuarkSocPkg 4) Apply optimizations to MtrrLib from MtrrLib in UefiCpuPkg 5) Convert all UNI files to utf-8 6) Replace tabs with spaces and remove trailing spaces 7) Add License.txt Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Acked-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19286 6f19259b-4bc3-4df7-8a09-765794883524
55 lines
1.8 KiB
C
55 lines
1.8 KiB
C
/** @file
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Registers definition for Intel QuarkNcSocId.
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Copyright (c) 2013-2015 Intel Corporation.
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef __INTEL_QNC_REGS_H__
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#define __INTEL_QNC_REGS_H__
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#include <QNCAccess.h>
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//
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// PCI HostBridge Segment number
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//
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#define QNC_PCI_HOST_BRIDGE_SEGMENT_NUMBER 0
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//
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// PCI RootBridge resource allocation's attribute
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//
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#define QNC_PCI_ROOT_BRIDGE_RESOURCE_ALLOCATION_ATTRIBUTE \
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EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM
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//
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// PCI HostBridge resource appeture
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//
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#define QNC_PCI_HOST_BRIDGE_RESOURCE_APPETURE_BUSBASE 0x0
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#define QNC_PCI_HOST_BRIDGE_RESOURCE_APPETURE_BUSLIMIT 0xff
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#define QNC_PCI_HOST_BRIDGE_RESOURCE_APPETURE_TSEG_SIZE 0x10000000
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//
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// PCI RootBridge configure port
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//
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#define QNC_PCI_ROOT_BRIDGE_CONFIGURATION_ADDRESS_PORT 0xCF8
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#define QNC_PCI_ROOT_BRIDGE_CONFIGURATION_DATA_PORT 0xCFC
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//
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// PCI Rootbridge's support feature
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//
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#define QNC_PCI_ROOT_BRIDGE_SUPPORTED (EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO | \
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EFI_PCI_ATTRIBUTE_ISA_IO | \
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EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO | \
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EFI_PCI_ATTRIBUTE_VGA_MEMORY | \
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EFI_PCI_ATTRIBUTE_VGA_IO)
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#endif // __INTEL_QNC_REGS_H__
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