9b6bbcdbfd
Changes for V4 ============== 1) Remove Unicode character from C source file 2) Move delete of QuarkSocPkg\QuarkNorthCluster\Binary\QuarkMicrocode from QuarkPlatformPkg commit to QuarkSocPkg commit Changes for V2 ============== 1) Sync with new APIs in SmmCpuFeaturesLib class 2) Use new generic PCI serial driver PciSioSerialDxe in MdeModulePkg 3) Remove PCI serial driver from QuarkSocPkg 4) Apply optimizations to MtrrLib from MtrrLib in UefiCpuPkg 5) Convert all UNI files to utf-8 6) Replace tabs with spaces and remove trailing spaces 7) Add License.txt Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Acked-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19286 6f19259b-4bc3-4df7-8a09-765794883524
130 lines
3.0 KiB
C
130 lines
3.0 KiB
C
/** @file
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PCH SPI SMM Driver implements the SPI Host Controller Compatibility Interface.
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Copyright (c) 2013-2015 Intel Corporation.
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include "PchSpi.h"
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SPI_INSTANCE *mSpiInstance;
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CONST UINT32 mSpiRegister[] = {
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R_QNC_RCRB_SPIS,
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R_QNC_RCRB_SPIPREOP,
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R_QNC_RCRB_SPIOPMENU,
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R_QNC_RCRB_SPIOPMENU + 4
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};
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EFI_STATUS
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EFIAPI
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InstallPchSpi (
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IN EFI_HANDLE ImageHandle,
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IN EFI_SYSTEM_TABLE *SystemTable
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)
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/*++
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Routine Description:
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Entry point for the SPI host controller driver.
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Arguments:
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ImageHandle Image handle of this driver.
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SystemTable Global system service table.
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Returns:
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EFI_SUCCESS Initialization complete.
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EFI_UNSUPPORTED The chipset is unsupported by this driver.
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EFI_OUT_OF_RESOURCES Do not have enough resources to initialize the driver.
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EFI_DEVICE_ERROR Device error, driver exits abnormally.
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--*/
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{
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EFI_STATUS Status;
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//
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// Allocate pool for SPI protocol instance
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//
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Status = gSmst->SmmAllocatePool (
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EfiRuntimeServicesData, // MemoryType don't care
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sizeof (SPI_INSTANCE),
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(VOID **) &mSpiInstance
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);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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if (mSpiInstance == NULL) {
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return EFI_OUT_OF_RESOURCES;
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}
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ZeroMem ((VOID *) mSpiInstance, sizeof (SPI_INSTANCE));
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//
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// Initialize the SPI protocol instance
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//
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Status = SpiProtocolConstructor (mSpiInstance);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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//
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// Install the SMM EFI_SPI_PROTOCOL interface
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//
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Status = gSmst->SmmInstallProtocolInterface (
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&(mSpiInstance->Handle),
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&gEfiSmmSpiProtocolGuid,
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EFI_NATIVE_INTERFACE,
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&(mSpiInstance->SpiProtocol)
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);
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if (EFI_ERROR (Status)) {
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gSmst->SmmFreePool (mSpiInstance);
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return EFI_DEVICE_ERROR;
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}
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return EFI_SUCCESS;
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}
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VOID
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EFIAPI
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SpiPhaseInit (
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VOID
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)
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/*++
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Routine Description:
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This function is a a hook for Spi Smm phase specific initialization
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Arguments:
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None
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Returns:
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None
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--*/
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{
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UINTN Index;
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//
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// Save SPI Registers for S3 resume usage
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//
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for (Index = 0; Index < sizeof (mSpiRegister) / sizeof (UINT32); Index++) {
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S3BootScriptSaveMemWrite (
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S3BootScriptWidthUint32,
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(UINTN) (mSpiInstance->PchRootComplexBar + mSpiRegister[Index]),
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1,
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(VOID *) (UINTN) (mSpiInstance->PchRootComplexBar + mSpiRegister[Index])
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);
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}
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}
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