717fb60443
PiSmmCpuDxeSmm consumes SmmAttributesTable and setup page table: 1) Code region is marked as read-only and Data region is non-executable, if the PE image is 4K aligned. 2) Important data structure is set to RO, such as GDT/IDT. 3) SmmSaveState is set to non-executable, and SmmEntrypoint is set to read-only. 4) If static page is supported, page table is read-only. We use page table to protect other components, and itself. If we use dynamic paging, we can still provide *partial* protection. And hope page table is not modified by other components. The XD enabling code is moved to SmiEntry to let NX take effect. Cc: Jeff Fan <jeff.fan@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Tested-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
81 lines
2.0 KiB
C
81 lines
2.0 KiB
C
/** @file
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IA-32 processor specific functions to enable SMM profile.
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Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include "PiSmmCpuDxeSmm.h"
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#include "SmmProfileInternal.h"
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/**
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Create SMM page table for S3 path.
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**/
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VOID
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InitSmmS3Cr3 (
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VOID
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)
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{
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mSmmS3ResumeState->SmmS3Cr3 = Gen4GPageTable (TRUE);
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return ;
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}
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/**
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Allocate pages for creating 4KB-page based on 2MB-page when page fault happens.
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32-bit firmware does not need it.
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**/
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VOID
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InitPagesForPFHandler (
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VOID
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)
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{
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}
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/**
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Update page table to map the memory correctly in order to make the instruction
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which caused page fault execute successfully. And it also save the original page
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table to be restored in single-step exception. 32-bit firmware does not need it.
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@param PageTable PageTable Address.
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@param PFAddress The memory address which caused page fault exception.
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@param CpuIndex The index of the processor.
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@param ErrorCode The Error code of exception.
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@param IsValidPFAddress The flag indicates if SMM profile data need be added.
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**/
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VOID
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RestorePageTableAbove4G (
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UINT64 *PageTable,
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UINT64 PFAddress,
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UINTN CpuIndex,
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UINTN ErrorCode,
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BOOLEAN *IsValidPFAddress
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)
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{
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}
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/**
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Clear TF in FLAGS.
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@param SystemContext A pointer to the processor context when
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the interrupt occurred on the processor.
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**/
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VOID
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ClearTrapFlag (
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IN OUT EFI_SYSTEM_CONTEXT SystemContext
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)
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{
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SystemContext.SystemContextIa32->Eflags &= (UINTN) ~BIT8;
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}
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