7b7fc3e783
The current coreboot UEFI payload has an assumption that all interrupt sources should be masked off before transferring control to the payload. However, it is not the case on some platforms, such as QEMU. It will cause boot failure due to unexpected pending interrupt in the payload. To resolve it all legacy 8259 interrupt sources need to be masked piror to the DXE phase. The fix was tested on QEMU virtual platform. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17550 6f19259b-4bc3-4df7-8a09-765794883524
42 lines
1.2 KiB
C
42 lines
1.2 KiB
C
/** @file
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The header file of Coreboot Support PEIM.
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Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef __PEI_COREBOOT_SUPPORT_H__
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#define __PEI_COREBOOT_SUPPORT_H__
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#include <PiPei.h>
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#include <Library/PeimEntryPoint.h>
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#include <Library/PeiServicesLib.h>
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#include <Library/BaseLib.h>
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#include <Library/DebugLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/HobLib.h>
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#include <Library/PcdLib.h>
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#include <Library/CbParseLib.h>
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#include <Library/MtrrLib.h>
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#include <Library/IoLib.h>
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#include <Guid/SmramMemoryReserve.h>
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#include <Guid/MemoryTypeInformation.h>
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#include <Guid/FirmwareFileSystem2.h>
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#include <Guid/FrameBufferInfoGuid.h>
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#include <Guid/SystemTableInfoGuid.h>
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#include <Guid/AcpiBoardInfoGuid.h>
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#include <Ppi/MasterBootMode.h>
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#endif
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