cf1d454983
Add FSP2.0 support. This series of patch is to support FSP2.0 specification at https://firmware.intel.com/sites/default/files/FSP_EAS_v2.0_Draft%20External.pdf Some major updates include: 1) One FSP binary is separated to multiple components: FSP-T, FSP-M, FSP-S, and optional FSP-O. Each component has its own configuration data region. 2) All FSP-APIs use same UPD format - FSP_UPD_HEADER. 3) Add EnumInitPhaseEndOfFirmware notifyphase. 4) FSP1.1/FSP1.0 compatibility is NOT maintained. 5) We also add rename Fsp* to FspWrapper* in IntelFsp2WrapperPkg, to indicate that it is for FspWrapper only. IntelFspPkg and IntelFspWrapperPkg will be deprecated. The new Intel platform will follow FSP2.0 and use IntelFsp2Pkg and IntelFsp2WrapperPkg. The old platform can still use IntelFspPkg and IntelFspWrapperPkg for compatibility consideration. Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Ravi P Rangarajan <ravi.p.rangarajan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Ravi P Rangarajan <ravi.p.rangarajan@intel.com>
47 lines
1.7 KiB
C
47 lines
1.7 KiB
C
/** @file
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Intel FSP status code definition
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Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php.
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef _FSP_STATUS_CODE_H_
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#define _FSP_STATUS_CODE_H_
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//
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// FSP API - 4 BITS
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//
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#define FSP_STATUS_CODE_TEMP_RAM_INIT 0xF000
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#define FSP_STATUS_CODE_MEMORY_INIT 0xD000
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#define FSP_STATUS_CODE_TEMP_RAM_EXIT 0xB000
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#define FSP_STATUS_CODE_SILICON_INIT 0x9000
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#define FSP_STATUS_CODE_POST_PCIE_ENUM_NOTIFICATION 0x6000
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#define FSP_STATUS_CODE_READY_TO_BOOT_NOTIFICATION 0x4000
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#define FSP_STATUS_CODE_END_OF_FIRMWARE_NOTIFICATION 0x2000
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//
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// MODULE - 4 BITS
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//
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#define FSP_STATUS_CODE_GFX_PEIM 0x0700
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#define FSP_STATUS_CODE_COMMON_CODE 0x0800
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#define FSP_STATUS_CODE_SILICON_COMMON_CODE 0x0900
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#define FSP_STATUS_CODE_SYSTEM_AGENT 0x0A00
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#define FSP_STATUS_CODE_PCH 0x0B00
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#define FSP_STATUS_CODE_CPU 0x0C00
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#define FSP_STATUS_CODE_MRC 0x0D00
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#define FSP_STATUS_CODE_ME_BIOS 0x0E00
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//
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// Individual Codes - 1 BYTE
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//
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#define FSP_STATUS_CODE_API_ENTRY 0x0000
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#define FSP_STATUS_CODE_API_EXIT 0x007F
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#endif
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