Files
system76-edk2/UefiCpuPkg/Library/CpuCommonFeaturesLib/FastStrings.c
Eric Dong d28daaddb3 UefiCpuPkg/CpuCommonFeaturesLib: Register MSR base on scope Info.
Because MSR has scope attribute, driver has no needs to set
MSR for all APs if MSR scope is core or package type. This patch
updates code to base on the MSR scope value to add MSR to the register
table.

Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
2018-10-22 11:19:49 +08:00

65 lines
2.4 KiB
C

/** @file
Fast-Strings feature.
Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "CpuCommonFeatures.h"
/**
Initializes Fast-Strings feature to specific state.
@param[in] ProcessorNumber The index of the CPU executing this function.
@param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION
structure for the CPU executing this function.
@param[in] ConfigData A pointer to the configuration buffer returned
by CPU_FEATURE_GET_CONFIG_DATA. NULL if
CPU_FEATURE_GET_CONFIG_DATA was not provided in
RegisterCpuFeature().
@param[in] State If TRUE, then the Fast-Strings feature must be enabled.
If FALSE, then the Fast-Strings feature must be disabled.
@retval RETURN_SUCCESS Fast-Strings feature is initialized.
@note This service could be called by BSP only.
**/
RETURN_STATUS
EFIAPI
FastStringsInitialize (
IN UINTN ProcessorNumber,
IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,
IN VOID *ConfigData, OPTIONAL
IN BOOLEAN State
)
{
//
// The scope of FastStrings bit in the MSR_IA32_MISC_ENABLE is core for below processor type, only program
// MSR_IA32_MISC_ENABLE for thread 0 in each core.
//
if (IS_SILVERMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
IS_GOLDMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
IS_PENTIUM_4_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {
if (CpuInfo->ProcessorInfo.Location.Thread != 0) {
return RETURN_SUCCESS;
}
}
CPU_REGISTER_TABLE_WRITE_FIELD (
ProcessorNumber,
Msr,
MSR_IA32_MISC_ENABLE,
MSR_IA32_MISC_ENABLE_REGISTER,
Bits.FastStrings,
(State) ? 1 : 0
);
return RETURN_SUCCESS;
}