d28daaddb3
Because MSR has scope attribute, driver has no needs to set MSR for all APs if MSR scope is core or package type. This patch updates code to base on the MSR scope value to add MSR to the register table. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
356 lines
13 KiB
C
356 lines
13 KiB
C
/** @file
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Machine Check features.
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Copyright (c) 2017 - 2018, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include "CpuCommonFeatures.h"
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/**
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Detects if Machine Check Exception feature supported on current processor.
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@param[in] ProcessorNumber The index of the CPU executing this function.
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@param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION
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structure for the CPU executing this function.
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@param[in] ConfigData A pointer to the configuration buffer returned
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by CPU_FEATURE_GET_CONFIG_DATA. NULL if
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CPU_FEATURE_GET_CONFIG_DATA was not provided in
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RegisterCpuFeature().
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@retval TRUE Machine Check Exception feature is supported.
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@retval FALSE Machine Check Exception feature is not supported.
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@note This service could be called by BSP/APs.
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**/
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BOOLEAN
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EFIAPI
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MceSupport (
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IN UINTN ProcessorNumber,
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IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,
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IN VOID *ConfigData OPTIONAL
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)
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{
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return (CpuInfo->CpuIdVersionInfoEdx.Bits.MCE == 1);
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}
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/**
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Initializes Machine Check Exception feature to specific state.
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@param[in] ProcessorNumber The index of the CPU executing this function.
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@param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION
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structure for the CPU executing this function.
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@param[in] ConfigData A pointer to the configuration buffer returned
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by CPU_FEATURE_GET_CONFIG_DATA. NULL if
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CPU_FEATURE_GET_CONFIG_DATA was not provided in
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RegisterCpuFeature().
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@param[in] State If TRUE, then the Machine Check Exception feature must be enabled.
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If FALSE, then the Machine Check Exception feature must be disabled.
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@retval RETURN_SUCCESS Machine Check Exception feature is initialized.
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@note This service could be called by BSP only.
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**/
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RETURN_STATUS
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EFIAPI
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MceInitialize (
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IN UINTN ProcessorNumber,
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IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,
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IN VOID *ConfigData, OPTIONAL
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IN BOOLEAN State
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)
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{
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//
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// Set MCE bit in CR4
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//
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CPU_REGISTER_TABLE_WRITE_FIELD (
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ProcessorNumber,
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ControlRegister,
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4,
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IA32_CR4,
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Bits.MCE,
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(State) ? 1 : 0
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);
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return RETURN_SUCCESS;
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}
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/**
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Detects if Machine Check Architecture feature supported on current processor.
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@param[in] ProcessorNumber The index of the CPU executing this function.
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@param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION
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structure for the CPU executing this function.
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@param[in] ConfigData A pointer to the configuration buffer returned
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by CPU_FEATURE_GET_CONFIG_DATA. NULL if
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CPU_FEATURE_GET_CONFIG_DATA was not provided in
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RegisterCpuFeature().
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@retval TRUE Machine Check Architecture feature is supported.
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@retval FALSE Machine Check Architecture feature is not supported.
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@note This service could be called by BSP/APs.
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**/
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BOOLEAN
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EFIAPI
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McaSupport (
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IN UINTN ProcessorNumber,
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IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,
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IN VOID *ConfigData OPTIONAL
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)
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{
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if (!MceSupport (ProcessorNumber, CpuInfo, ConfigData)) {
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return FALSE;
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}
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return (CpuInfo->CpuIdVersionInfoEdx.Bits.MCA == 1);
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}
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/**
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Initializes Machine Check Architecture feature to specific state.
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@param[in] ProcessorNumber The index of the CPU executing this function.
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@param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION
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structure for the CPU executing this function.
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@param[in] ConfigData A pointer to the configuration buffer returned
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by CPU_FEATURE_GET_CONFIG_DATA. NULL if
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CPU_FEATURE_GET_CONFIG_DATA was not provided in
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RegisterCpuFeature().
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@param[in] State If TRUE, then the Machine Check Architecture feature must be enabled.
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If FALSE, then the Machine Check Architecture feature must be disabled.
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@retval RETURN_SUCCESS Machine Check Architecture feature is initialized.
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@note This service could be called by BSP only.
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**/
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RETURN_STATUS
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EFIAPI
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McaInitialize (
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IN UINTN ProcessorNumber,
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IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,
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IN VOID *ConfigData, OPTIONAL
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IN BOOLEAN State
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)
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{
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MSR_IA32_MCG_CAP_REGISTER McgCap;
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UINT32 BankIndex;
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//
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// The scope of MSR_IA32_MC*_CTL/MSR_IA32_MC*_STATUS is core for below processor type, only program
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// MSR_IA32_MC*_CTL/MSR_IA32_MC*_STATUS for thread 0 in each core.
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//
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if (IS_ATOM_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
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IS_SILVERMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
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IS_SANDY_BRIDGE_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
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IS_SKYLAKE_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
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IS_XEON_PHI_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
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IS_PENTIUM_4_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
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IS_CORE_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {
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if (CpuInfo->ProcessorInfo.Location.Thread != 0) {
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return RETURN_SUCCESS;
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}
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}
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//
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// The scope of MSR_IA32_MC*_CTL/MSR_IA32_MC*_STATUS is package for below processor type, only program
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// MSR_IA32_MC*_CTL/MSR_IA32_MC*_STATUS for thread 0 core 0 in each package.
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//
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if (IS_NEHALEM_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {
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if ((CpuInfo->ProcessorInfo.Location.Thread != 0) || (CpuInfo->ProcessorInfo.Location.Core != 0)) {
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return RETURN_SUCCESS;
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}
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}
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if (State) {
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McgCap.Uint64 = AsmReadMsr64 (MSR_IA32_MCG_CAP);
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for (BankIndex = 0; BankIndex < (UINT32) McgCap.Bits.Count; BankIndex++) {
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CPU_REGISTER_TABLE_WRITE64 (
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ProcessorNumber,
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Msr,
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MSR_IA32_MC0_CTL + BankIndex * 4,
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MAX_UINT64
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);
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}
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if (PcdGetBool (PcdIsPowerOnReset)) {
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for (BankIndex = 0; BankIndex < (UINTN) McgCap.Bits.Count; BankIndex++) {
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CPU_REGISTER_TABLE_WRITE64 (
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ProcessorNumber,
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Msr,
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MSR_IA32_MC0_STATUS + BankIndex * 4,
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0
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);
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}
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}
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}
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return RETURN_SUCCESS;
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}
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/**
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Detects if IA32_MCG_CTL feature supported on current processor.
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@param[in] ProcessorNumber The index of the CPU executing this function.
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@param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION
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structure for the CPU executing this function.
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@param[in] ConfigData A pointer to the configuration buffer returned
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by CPU_FEATURE_GET_CONFIG_DATA. NULL if
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CPU_FEATURE_GET_CONFIG_DATA was not provided in
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RegisterCpuFeature().
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@retval TRUE IA32_MCG_CTL feature is supported.
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@retval FALSE IA32_MCG_CTL feature is not supported.
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@note This service could be called by BSP/APs.
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**/
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BOOLEAN
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EFIAPI
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McgCtlSupport (
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IN UINTN ProcessorNumber,
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IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,
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IN VOID *ConfigData OPTIONAL
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)
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{
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MSR_IA32_MCG_CAP_REGISTER McgCap;
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if (!McaSupport (ProcessorNumber, CpuInfo, ConfigData)) {
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return FALSE;
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}
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McgCap.Uint64 = AsmReadMsr64 (MSR_IA32_MCG_CAP);
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return (McgCap.Bits.MCG_CTL_P == 1);
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}
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/**
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Initializes IA32_MCG_CTL feature to specific state.
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@param[in] ProcessorNumber The index of the CPU executing this function.
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@param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION
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structure for the CPU executing this function.
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@param[in] ConfigData A pointer to the configuration buffer returned
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by CPU_FEATURE_GET_CONFIG_DATA. NULL if
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CPU_FEATURE_GET_CONFIG_DATA was not provided in
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RegisterCpuFeature().
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@param[in] State If TRUE, then the IA32_MCG_CTL feature must be enabled.
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If FALSE, then the IA32_MCG_CTL feature must be disabled.
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@retval RETURN_SUCCESS IA32_MCG_CTL feature is initialized.
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@note This service could be called by BSP only.
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**/
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RETURN_STATUS
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EFIAPI
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McgCtlInitialize (
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IN UINTN ProcessorNumber,
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IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,
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IN VOID *ConfigData, OPTIONAL
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IN BOOLEAN State
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)
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{
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CPU_REGISTER_TABLE_WRITE64 (
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ProcessorNumber,
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Msr,
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MSR_IA32_MCG_CTL,
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(State)? MAX_UINT64 : 0
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);
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return RETURN_SUCCESS;
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}
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/**
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Detects if Local machine check exception feature supported on current
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processor.
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@param[in] ProcessorNumber The index of the CPU executing this function.
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@param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION
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structure for the CPU executing this function.
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@param[in] ConfigData A pointer to the configuration buffer returned
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by CPU_FEATURE_GET_CONFIG_DATA. NULL if
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CPU_FEATURE_GET_CONFIG_DATA was not provided in
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RegisterCpuFeature().
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@retval TRUE Local machine check exception feature is supported.
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@retval FALSE Local machine check exception feature is not supported.
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@note This service could be called by BSP/APs.
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**/
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BOOLEAN
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EFIAPI
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LmceSupport (
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IN UINTN ProcessorNumber,
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IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,
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IN VOID *ConfigData OPTIONAL
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)
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{
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MSR_IA32_MCG_CAP_REGISTER McgCap;
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if (!McaSupport (ProcessorNumber, CpuInfo, ConfigData)) {
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return FALSE;
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}
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McgCap.Uint64 = AsmReadMsr64 (MSR_IA32_MCG_CAP);
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if (ProcessorNumber == 0) {
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DEBUG ((EFI_D_INFO, "LMCE eanble = %x\n", (BOOLEAN) (McgCap.Bits.MCG_LMCE_P != 0)));
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}
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return (BOOLEAN) (McgCap.Bits.MCG_LMCE_P != 0);
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}
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/**
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Initializes Local machine check exception feature to specific state.
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@param[in] ProcessorNumber The index of the CPU executing this function.
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@param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION
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structure for the CPU executing this function.
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@param[in] ConfigData A pointer to the configuration buffer returned
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by CPU_FEATURE_GET_CONFIG_DATA. NULL if
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CPU_FEATURE_GET_CONFIG_DATA was not provided in
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RegisterCpuFeature().
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@param[in] State If TRUE, then the Local machine check exception
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feature must be enabled.
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If FALSE, then the Local machine check exception
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feature must be disabled.
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@retval RETURN_SUCCESS Local machine check exception feature is initialized.
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**/
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RETURN_STATUS
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EFIAPI
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LmceInitialize (
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IN UINTN ProcessorNumber,
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IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,
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IN VOID *ConfigData, OPTIONAL
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IN BOOLEAN State
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)
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{
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MSR_IA32_FEATURE_CONTROL_REGISTER *MsrRegister;
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//
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// The scope of FastStrings bit in the MSR_IA32_MISC_ENABLE is core for below processor type, only program
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// MSR_IA32_MISC_ENABLE for thread 0 in each core.
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//
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if (IS_SILVERMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
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IS_GOLDMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
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IS_PENTIUM_4_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {
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if (CpuInfo->ProcessorInfo.Location.Thread != 0) {
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return RETURN_SUCCESS;
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}
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}
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ASSERT (ConfigData != NULL);
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MsrRegister = (MSR_IA32_FEATURE_CONTROL_REGISTER *) ConfigData;
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if (MsrRegister[ProcessorNumber].Bits.Lock == 0) {
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CPU_REGISTER_TABLE_WRITE_FIELD (
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ProcessorNumber,
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Msr,
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MSR_IA32_FEATURE_CONTROL,
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MSR_IA32_FEATURE_CONTROL_REGISTER,
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Bits.LmceOn,
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(State) ? 1 : 0
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);
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}
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return RETURN_SUCCESS;
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}
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