d28daaddb3
Because MSR has scope attribute, driver has no needs to set MSR for all APs if MSR scope is core or package type. This patch updates code to base on the MSR scope value to add MSR to the register table. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
102 lines
3.8 KiB
C
102 lines
3.8 KiB
C
/** @file
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Pending Break feature.
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Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include "CpuCommonFeatures.h"
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/**
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Detects if Pending Break feature supported on current processor.
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@param[in] ProcessorNumber The index of the CPU executing this function.
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@param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION
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structure for the CPU executing this function.
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@param[in] ConfigData A pointer to the configuration buffer returned
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by CPU_FEATURE_GET_CONFIG_DATA. NULL if
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CPU_FEATURE_GET_CONFIG_DATA was not provided in
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RegisterCpuFeature().
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@retval TRUE Pending Break feature is supported.
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@retval FALSE Pending Break feature is not supported.
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@note This service could be called by BSP/APs.
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**/
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BOOLEAN
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EFIAPI
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PendingBreakSupport (
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IN UINTN ProcessorNumber,
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IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,
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IN VOID *ConfigData OPTIONAL
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)
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{
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if (IS_ATOM_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
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IS_CORE2_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
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IS_CORE_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
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IS_PENTIUM_4_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
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IS_PENTIUM_M_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {
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return (CpuInfo->CpuIdVersionInfoEdx.Bits.PBE == 1);
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}
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return FALSE;
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}
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/**
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Initializes Pending Break feature to specific state.
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@param[in] ProcessorNumber The index of the CPU executing this function.
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@param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION
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structure for the CPU executing this function.
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@param[in] ConfigData A pointer to the configuration buffer returned
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by CPU_FEATURE_GET_CONFIG_DATA. NULL if
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CPU_FEATURE_GET_CONFIG_DATA was not provided in
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RegisterCpuFeature().
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@param[in] State If TRUE, then the Pending Break feature must be enabled.
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If FALSE, then the Pending Break feature must be disabled.
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@retval RETURN_SUCCESS Pending Break feature is initialized.
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@note This service could be called by BSP only.
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**/
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RETURN_STATUS
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EFIAPI
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PendingBreakInitialize (
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IN UINTN ProcessorNumber,
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IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo,
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IN VOID *ConfigData, OPTIONAL
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IN BOOLEAN State
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)
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{
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//
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// The scope of the MSR_ATOM_IA32_MISC_ENABLE is core for below processor type, only program
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// MSR_ATOM_IA32_MISC_ENABLE for thread 0 in each core.
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//
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// Support function has check the processer type for this feature, no need to check again
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// here.
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//
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if (CpuInfo->ProcessorInfo.Location.Thread != 0) {
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return RETURN_SUCCESS;
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}
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//
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// ATOM, CORE2, CORE, PENTIUM_4 and IS_PENTIUM_M_PROCESSOR have the same MSR index,
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// Simply use MSR_ATOM_IA32_MISC_ENABLE here
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//
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CPU_REGISTER_TABLE_WRITE_FIELD (
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ProcessorNumber,
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Msr,
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MSR_ATOM_IA32_MISC_ENABLE,
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MSR_ATOM_IA32_MISC_ENABLE_REGISTER,
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Bits.FERR,
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(State) ? 1 : 0
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);
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return RETURN_SUCCESS;
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}
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