87d0e572c8
The UEFI protocol database cannot contain gEfiLegacyBiosProtocolGuid any
longer, after excluding LegacyBiosDxe from the OVMF platforms. Therefore,
instruct PciBusDxe from IncompatiblePciDeviceSupportDxe to allocate 64-bit
BARs above 4 GB regardless of a CSM.
Regression test: in commit 855743f717 ("OvmfPkg: prevent 64-bit MMIO BAR
degradation if there is no CSM", 2016-05-25), where we introduced
IncompatiblePciDeviceSupportDxe, we said, "By default, the PCI Bus driver
considers an option ROM reason enough for allocating the 64-bit MMIO BARs
in 32-bit address space". Therefore it suffices to verify the 64-bit BARs
of a device for which QEMU provides an option ROM. The simplest case is
the virtio-net-pci device. And indeed, with this patch applied, the log
contains:
> PciBus: Discovered PCI @ [04|00|00] [VID = 0x1AF4, DID = 0x1041]
> BAR[1]: Type = Mem32; Alignment = 0xFFF; Length = 0x1000; Offset = 0x14
> BAR[4]: Type = PMem64; Alignment = 0x3FFF; Length = 0x4000; Offset = 0x20
This portion shows that Bus|Device|Function 04|00|00 is a (modern)
virito-net-pci device [VID = 0x1AF4, DID = 0x1041].
> PciBus: Resource Map for Bridge [00|01|03]
> Type = Mem32; Base = 0x81200000; Length = 0x200000; Alignment = 0x1FFFFF
> Base = Padding; Length = 0x200000; Alignment = 0x1FFFFF
> Base = 0x81200000; Length = 0x1000; Alignment = 0xFFF; Owner = PCI [04|00|00:14]
> Type = Mem32; Base = 0x81A43000; Length = 0x1000; Alignment = 0xFFF
> Type = PMem64; Base = 0x800200000; Length = 0x100000; Alignment = 0xFFFFF
> Base = 0x800200000; Length = 0x4000; Alignment = 0x3FFF; Owner = PCI [04|00|00:20]
This quote shows that 04|00|00 has a BAR at 0x8_0020_0000.
(It also shows that the device is behind a bridge (PCIe root port) whose
own BDF is 00|01|03.)
> [Security] 3rd party image[7CEEB418] can be loaded after EndOfDxe: PciRoot(0x0)/Pci(0x1,0x3)/Pci(0x0,0x0)/Offset(0x10E00,0x273FF).
> None of Tcg2Protocol/CcMeasurementProtocol is installed.
> InstallProtocolInterface: [EfiLoadedImageProtocol] 7D2E5140
> Loading driver at 0x0007CA9F000 EntryPoint=0x0007CAA5447 1af41000.efi
> InstallProtocolInterface: [EfiLoadedImageDevicePathProtocol] 7D5B2198
And this part finally shows that the iPXE option ROM for the device
(1af41000.efi) was detected and is loaded. (Same PCIe root port, and PCIe
root ports can only host a single device.)
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=4588
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20231110235820.644381-14-lersek@redhat.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Acked-by: Corvin Köhne <corvink@FreeBSD.org>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
278 lines
12 KiB
C
278 lines
12 KiB
C
/** @file
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A simple DXE_DRIVER that causes the PCI Bus UEFI_DRIVER to allocate 64-bit
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MMIO BARs above 4 GB, regardless of option ROM availability, conserving 32-bit
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MMIO aperture for 32-bit BARs.
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Copyright (C) 2016, Red Hat, Inc.
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Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <Library/BaseLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <IndustryStandard/Acpi10.h>
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#include <IndustryStandard/Pci22.h>
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#include <Library/DebugLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Library/PcdLib.h>
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#include <Library/UefiBootServicesTableLib.h>
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#include <Library/CcProbeLib.h>
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#include <Protocol/IncompatiblePciDeviceSupport.h>
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//
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// The protocol interface this driver produces.
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//
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STATIC EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL
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mIncompatiblePciDeviceSupport;
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//
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// Configuration template for the CheckDevice() protocol member function.
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//
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// Refer to Table 20 "ACPI 2.0 & 3.0 QWORD Address Space Descriptor Usage" in
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// the Platform Init 1.4a Spec, Volume 5.
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//
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// This structure is interpreted by the UpdatePciInfo() function in the edk2
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// PCI Bus UEFI_DRIVER.
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//
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// This structure looks like:
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// AddressDesc-1 + AddressDesc-2 + ... + AddressDesc-n + EndDesc
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//
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STATIC CONST EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR mMmio64Configuration = {
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ACPI_ADDRESS_SPACE_DESCRIPTOR, // Desc
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(UINT16)( // Len
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sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) -
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OFFSET_OF (
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EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR,
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ResType
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)
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),
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ACPI_ADDRESS_SPACE_TYPE_MEM, // ResType
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0, // GenFlag
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0, // SpecificFlag
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64, // AddrSpaceGranularity:
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// aperture selection hint
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// for BAR allocation
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0, // AddrRangeMin
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0, // AddrRangeMax:
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// no special alignment
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// for affected BARs
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MAX_UINT64, // AddrTranslationOffset:
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// hint covers all
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// eligible BARs
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0 // AddrLen:
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// use probed BAR size
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};
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//
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// mOptionRomConfiguration is present only in Td guest.
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// Host VMM can inject option ROM which is untrusted in Td guest,
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// so PCI option ROM needs to be ignored.
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// According to "Table 20. ACPI 2.0 & 3.0 QWORD Address Space Descriptor Usage"
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// PI spec 1.7, type-specific flags can be set to 0 when
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// Address Translation Offset == 6 to skip device option ROM.
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//
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STATIC CONST EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR mOptionRomConfiguration = {
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ACPI_ADDRESS_SPACE_DESCRIPTOR, // Desc
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(UINT16)( // Len
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sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) -
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OFFSET_OF (
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EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR,
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ResType
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)
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),
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ACPI_ADDRESS_SPACE_TYPE_MEM, // ResType
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0, // GenFlag
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0, // Disable option roms SpecificFlag
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64, // AddrSpaceGranularity:
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// aperture selection hint
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// for BAR allocation
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MAX_UINT64, // AddrRangeMin
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MAX_UINT64, // AddrRangeMax:
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// no special alignment
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// for affected BARs
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6, // AddrTranslationOffset:
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// hint covers all
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// eligible BARs
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0 // AddrLen:
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// use probed BAR size
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};
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STATIC CONST EFI_ACPI_END_TAG_DESCRIPTOR mEndDesc = {
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ACPI_END_TAG_DESCRIPTOR, // Desc
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0 // Checksum: to be ignored
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};
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/**
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Returns a list of ACPI resource descriptors that detail the special resource
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configuration requirements for an incompatible PCI device.
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Prior to bus enumeration, the PCI bus driver will look for the presence of
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the EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL. Only one instance of this
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protocol can be present in the system. For each PCI device that the PCI bus
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driver discovers, the PCI bus driver calls this function with the device's
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vendor ID, device ID, revision ID, subsystem vendor ID, and subsystem device
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ID. If the VendorId, DeviceId, RevisionId, SubsystemVendorId, or
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SubsystemDeviceId value is set to (UINTN)-1, that field will be ignored. The
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ID values that are not (UINTN)-1 will be used to identify the current device.
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This function will only return EFI_SUCCESS. However, if the device is an
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incompatible PCI device, a list of ACPI resource descriptors will be returned
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in Configuration. Otherwise, NULL will be returned in Configuration instead.
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The PCI bus driver does not need to allocate memory for Configuration.
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However, it is the PCI bus driver's responsibility to free it. The PCI bus
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driver then can configure this device with the information that is derived
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from this list of resource nodes, rather than the result of BAR probing.
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Only the following two resource descriptor types from the ACPI Specification
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may be used to describe the incompatible PCI device resource requirements:
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- QWORD Address Space Descriptor (ACPI 2.0, section 6.4.3.5.1; also ACPI 3.0)
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- End Tag (ACPI 2.0, section 6.4.2.8; also ACPI 3.0)
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The QWORD Address Space Descriptor can describe memory, I/O, and bus number
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ranges for dynamic or fixed resources. The configuration of a PCI root bridge
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is described with one or more QWORD Address Space Descriptors, followed by an
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End Tag. See the ACPI Specification for details on the field values.
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@param[in] This Pointer to the
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EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL
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instance.
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@param[in] VendorId A unique ID to identify the manufacturer of
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the PCI device. See the Conventional PCI
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Specification 3.0 for details.
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@param[in] DeviceId A unique ID to identify the particular PCI
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device. See the Conventional PCI
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Specification 3.0 for details.
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@param[in] RevisionId A PCI device-specific revision identifier.
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See the Conventional PCI Specification 3.0
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for details.
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@param[in] SubsystemVendorId Specifies the subsystem vendor ID. See the
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Conventional PCI Specification 3.0 for
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details.
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@param[in] SubsystemDeviceId Specifies the subsystem device ID. See the
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Conventional PCI Specification 3.0 for
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details.
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@param[out] Configuration A list of ACPI resource descriptors that
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detail the configuration requirement.
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@retval EFI_SUCCESS The function always returns EFI_SUCCESS.
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**/
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STATIC
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EFI_STATUS
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EFIAPI
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CheckDevice (
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IN EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL *This,
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IN UINTN VendorId,
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IN UINTN DeviceId,
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IN UINTN RevisionId,
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IN UINTN SubsystemVendorId,
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IN UINTN SubsystemDeviceId,
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OUT VOID **Configuration
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)
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{
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UINTN Length;
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UINT8 *Ptr;
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//
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// Unlike the general description of this protocol member suggests, there is
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// nothing incompatible about the PCI devices that we'll match here. We'll
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// match all PCI devices, and generate exactly one QWORD Address Space
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// Descriptor for each. That descriptor will instruct the PCI Bus UEFI_DRIVER
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// not to degrade 64-bit MMIO BARs for the device, even if a PCI option ROM
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// BAR is present on the device.
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//
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// The concern captured in the PCI Bus UEFI_DRIVER is that a legacy BIOS boot
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// (via a CSM) could dispatch a legacy option ROM on the device, which might
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// have trouble with MMIO BARs that have been allocated outside of the 32-bit
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// address space. But, we don't support legacy option ROMs at all, thus this
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// problem cannot arise.
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//
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// This member function is mis-specified actually: it is supposed to allocate
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// memory, but as specified, it could not return an error status. Thankfully,
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// the edk2 PCI Bus UEFI_DRIVER actually handles error codes; see the
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// UpdatePciInfo() function.
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//
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Length = sizeof mMmio64Configuration + sizeof mEndDesc;
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//
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// In Td guest OptionRom is not allowed.
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//
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if (CcProbe ()) {
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Length += sizeof mOptionRomConfiguration;
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}
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*Configuration = AllocateZeroPool (Length);
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if (*Configuration == NULL) {
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DEBUG ((
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DEBUG_WARN,
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"%a: 64-bit MMIO BARs may be degraded for PCI 0x%04x:0x%04x (rev %d)\n",
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__func__,
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(UINT32)VendorId,
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(UINT32)DeviceId,
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(UINT8)RevisionId
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));
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return EFI_OUT_OF_RESOURCES;
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}
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Ptr = (UINT8 *)(UINTN)*Configuration;
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CopyMem (Ptr, &mMmio64Configuration, sizeof mMmio64Configuration);
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Length = sizeof mMmio64Configuration;
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if (CcProbe ()) {
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CopyMem (Ptr + Length, &mOptionRomConfiguration, sizeof mOptionRomConfiguration);
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Length += sizeof mOptionRomConfiguration;
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}
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CopyMem (Ptr + Length, &mEndDesc, sizeof mEndDesc);
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return EFI_SUCCESS;
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}
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/**
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Entry point for this driver.
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@param[in] ImageHandle Image handle of this driver.
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@param[in] SystemTable Pointer to SystemTable.
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@retval EFI_SUCESS Driver has loaded successfully.
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@retval EFI_UNSUPPORTED PCI resource allocation has been disabled.
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@retval EFI_UNSUPPORTED There is no 64-bit PCI MMIO aperture.
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@return Error codes from lower level functions.
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**/
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EFI_STATUS
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EFIAPI
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DriverInitialize (
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IN EFI_HANDLE ImageHandle,
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IN EFI_SYSTEM_TABLE *SystemTable
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)
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{
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EFI_STATUS Status;
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//
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// If there is no 64-bit PCI MMIO aperture, then 64-bit MMIO BARs have to be
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// allocated under 4 GB unconditionally.
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//
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if (PcdGet64 (PcdPciMmio64Size) == 0) {
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return EFI_UNSUPPORTED;
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}
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mIncompatiblePciDeviceSupport.CheckDevice = CheckDevice;
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Status = gBS->InstallMultipleProtocolInterfaces (
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&ImageHandle,
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&gEfiIncompatiblePciDeviceSupportProtocolGuid,
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&mIncompatiblePciDeviceSupport,
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NULL
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);
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return Status;
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}
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