8ef7e222ae
ResetVector assembly implementation puts "ALIGN 16" in the end to guarantee the final executable file size is multiple of 16 bytes. Because the module uses a special GUID which guarantees it's put in the very end of a FV, which should be also the end of the FD. All of these (file size is multiple of 16B, and the module is put at end of FV, FV is put at end of FD) guarantee the "JMP xxx" instruction is at FFFF_FFF0h. This patch updates INF file and ReadMe.txt to add guidance of FDF ffs rule for the ResetVector. Signed-off-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
29 lines
910 B
Plaintext
29 lines
910 B
Plaintext
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=== HOW TO USE VTF0 ===
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Add this line to your DSC [Components.IA32] or [Components.X64] section:
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UefiCpuPkg/ResetVector/Vtf0/ResetVector.inf
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Add this line to your FDF FV section:
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INF RuleOverride=RESET_VECTOR UefiCpuPkg/ResetVector/Vtf0/ResetVector.inf
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In your FDF FFS file rules sections add:
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[Rule.Common.SEC.RESET_VECTOR]
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FILE RAW = $(NAMED_GUID) {
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RAW BIN |.bin
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}
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=== VTF0 Boot Flow ===
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1. Transition to IA32 flat mode
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2. Locate BFV (Boot Firmware Volume) by checking every 4kb boundary
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3. Locate SEC image
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4. X64 VTF0 transitions to X64 mode
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5. Call SEC image entry point
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== VTF0 SEC input parameters ==
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All inputs to SEC image are register based:
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EAX/RAX - Initial value of the EAX register (BIST: Built-in Self Test)
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DI - 'BP': boot-strap processor, or 'AP': application processor
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EBP/RBP - Pointer to the start of the Boot Firmware Volume
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