f4a257a355
Extend parameter list of PciHostBridgeUtilityGetRootBridges() with BusMin/ BusMax, so that the utility function could be compatible with ArmVirtPkg who uses mutable bus range [BusMin, BusMax] insteand of [0, PCI_MAX_BUS]. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3059 Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Signed-off-by: Jiahui Cen <cenjiahui@huawei.com> Message-Id: <20210119011302.10908-10-cenjiahui@huawei.com> [lersek@redhat.com: fix logging of UINTN values BusMin, BusMax] [lersek@redhat.com: keep zeroing of (*Count) centralized] [lersek@redhat.com: fix typos in ExtraRootBridges comment] Reviewed-by: Laszlo Ersek <lersek@redhat.com>
140 lines
4.0 KiB
C
140 lines
4.0 KiB
C
/** @file
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OVMF's instance of the PCI Host Bridge Library.
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Copyright (C) 2016, Red Hat, Inc.
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Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <PiDxe.h>
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#include <IndustryStandard/Pci.h>
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#include <IndustryStandard/Q35MchIch9.h>
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#include <Protocol/PciHostBridgeResourceAllocation.h>
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#include <Protocol/PciRootBridgeIo.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/DebugLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Library/PcdLib.h>
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#include <Library/PciHostBridgeLib.h>
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#include <Library/PciHostBridgeUtilityLib.h>
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#include "PciHostBridge.h"
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STATIC PCI_ROOT_BRIDGE_APERTURE mNonExistAperture = { MAX_UINT64, 0 };
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/**
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Return all the root bridge instances in an array.
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@param Count Return the count of root bridge instances.
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@return All the root bridge instances in an array.
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The array should be passed into PciHostBridgeFreeRootBridges()
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when it's not used.
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**/
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PCI_ROOT_BRIDGE *
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EFIAPI
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PciHostBridgeGetRootBridges (
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UINTN *Count
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)
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{
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UINT64 Attributes;
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UINT64 AllocationAttributes;
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PCI_ROOT_BRIDGE_APERTURE Io;
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PCI_ROOT_BRIDGE_APERTURE Mem;
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PCI_ROOT_BRIDGE_APERTURE MemAbove4G;
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if (PcdGetBool (PcdPciDisableBusEnumeration)) {
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return ScanForRootBridges (Count);
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}
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ZeroMem (&Io, sizeof (Io));
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ZeroMem (&Mem, sizeof (Mem));
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ZeroMem (&MemAbove4G, sizeof (MemAbove4G));
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Attributes = EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO |
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EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO |
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EFI_PCI_ATTRIBUTE_ISA_IO_16 |
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EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO |
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EFI_PCI_ATTRIBUTE_VGA_MEMORY |
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EFI_PCI_ATTRIBUTE_VGA_IO_16 |
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EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;
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AllocationAttributes = EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM;
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if (PcdGet64 (PcdPciMmio64Size) > 0) {
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AllocationAttributes |= EFI_PCI_HOST_BRIDGE_MEM64_DECODE;
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MemAbove4G.Base = PcdGet64 (PcdPciMmio64Base);
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MemAbove4G.Limit = PcdGet64 (PcdPciMmio64Base) +
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PcdGet64 (PcdPciMmio64Size) - 1;
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} else {
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CopyMem (&MemAbove4G, &mNonExistAperture, sizeof (mNonExistAperture));
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}
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Io.Base = PcdGet64 (PcdPciIoBase);
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Io.Limit = PcdGet64 (PcdPciIoBase) + (PcdGet64 (PcdPciIoSize) - 1);
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Mem.Base = PcdGet64 (PcdPciMmio32Base);
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Mem.Limit = PcdGet64 (PcdPciMmio32Base) + (PcdGet64 (PcdPciMmio32Size) - 1);
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return PciHostBridgeUtilityGetRootBridges (
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Count,
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Attributes,
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AllocationAttributes,
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FALSE,
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PcdGet16 (PcdOvmfHostBridgePciDevId) != INTEL_Q35_MCH_DEVICE_ID,
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0,
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PCI_MAX_BUS,
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&Io,
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&Mem,
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&MemAbove4G,
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&mNonExistAperture,
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&mNonExistAperture
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);
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}
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/**
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Free the root bridge instances array returned from
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PciHostBridgeGetRootBridges().
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@param The root bridge instances array.
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@param The count of the array.
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**/
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VOID
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EFIAPI
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PciHostBridgeFreeRootBridges (
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PCI_ROOT_BRIDGE *Bridges,
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UINTN Count
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)
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{
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PciHostBridgeUtilityFreeRootBridges (Bridges, Count);
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}
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/**
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Inform the platform that the resource conflict happens.
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@param HostBridgeHandle Handle of the Host Bridge.
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@param Configuration Pointer to PCI I/O and PCI memory resource
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descriptors. The Configuration contains the resources
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for all the root bridges. The resource for each root
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bridge is terminated with END descriptor and an
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additional END is appended indicating the end of the
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entire resources. The resource descriptor field
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values follow the description in
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EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
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.SubmitResources().
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**/
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VOID
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EFIAPI
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PciHostBridgeResourceConflict (
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EFI_HANDLE HostBridgeHandle,
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VOID *Configuration
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)
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{
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PciHostBridgeUtilityResourceConflict (Configuration);
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}
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