This patch fixes the following Ecc reported error: Only capital letters are allowed to be used for #define declarations Edk2 coding standard stating that: "Names starting with one or two underscores, such as _MACRO_GUARD_FILE_NAME_H_, must not be used." the include guard of ArmCortexA5x.h is also updated. Ref: https://edk2-docs.gitbook.io/edk-ii-c-coding-standards-specification/ 5_source_files/53_include_files# 5-3-5-all-include-file-contents-must-be-protected-by-a-include-guard Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
		
			
				
	
	
		
			115 lines
		
	
	
		
			3.0 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
			
		
		
	
	
			115 lines
		
	
	
		
			3.0 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
| #
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| #  Copyright (c) 2011-2021, Arm Limited. All rights reserved.<BR>
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| #
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| #  SPDX-License-Identifier: BSD-2-Clause-Patent
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| #
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| #
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| 
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| #include <Chipset/AArch64.h>
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| #include <AsmMacroIoLibV8.h>
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| #include <Base.h>
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| #include <AutoGen.h>
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| 
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| .text
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| 
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| //============================================================
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| //Default Exception Handlers
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| //============================================================
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| 
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| #define TO_HANDLER                                              \
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|    EL1_OR_EL2(x1)                                               \
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| 1: mrs  x1, elr_el1    /* EL1 Exception Link Register */       ;\
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|    b    3f                                                     ;\
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| 2: mrs  x1, elr_el2    /* EL2 Exception Link Register */       ;\
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| 3: bl   ASM_PFX(PeiCommonExceptionEntry)                       ;
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| 
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| 
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| //
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| // Default Exception handlers: There is no plan to return from any of these exceptions.
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| // No context saving at all.
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| //
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| 
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| VECTOR_BASE(PeiVectorTable)
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| 
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| VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SP0_SYNC)
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| _DefaultSyncExceptHandler_t:
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|   mov  x0, #EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS
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|   TO_HANDLER
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| 
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| VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SP0_IRQ)
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| _DefaultIrq_t:
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|   mov  x0, #EXCEPT_AARCH64_IRQ
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|   TO_HANDLER
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| 
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| VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SP0_FIQ)
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| _DefaultFiq_t:
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|   mov  x0, #EXCEPT_AARCH64_FIQ
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|   TO_HANDLER
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| 
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| VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SP0_SERR)
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| _DefaultSError_t:
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|   mov  x0, #EXCEPT_AARCH64_SERROR
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|   TO_HANDLER
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| 
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| VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPX_SYNC)
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| _DefaultSyncExceptHandler_h:
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|   mov  x0, #EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS
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|   TO_HANDLER
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| 
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| VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPX_IRQ)
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| _DefaultIrq_h:
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|   mov  x0, #EXCEPT_AARCH64_IRQ
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|   TO_HANDLER
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| 
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| VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPX_FIQ)
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| _DefaultFiq_h:
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|   mov  x0, #EXCEPT_AARCH64_FIQ
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|   TO_HANDLER
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| 
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| VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPX_SERR)
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| _DefaultSError_h:
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|   mov  x0, #EXCEPT_AARCH64_SERROR
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|   TO_HANDLER
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| 
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| VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A64_SYNC)
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| _DefaultSyncExceptHandler_LowerA64:
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|   mov  x0, #EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS
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|   TO_HANDLER
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| 
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| VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A64_IRQ)
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| _DefaultIrq_LowerA64:
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|   mov  x0, #EXCEPT_AARCH64_IRQ
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|   TO_HANDLER
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| 
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| VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A64_FIQ)
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| _DefaultFiq_LowerA64:
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|   mov  x0, #EXCEPT_AARCH64_FIQ
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|   TO_HANDLER
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| 
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| VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A64_SERR)
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| _DefaultSError_LowerA64:
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|   mov  x0, #EXCEPT_AARCH64_SERROR
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|   TO_HANDLER
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| 
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| VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A32_SYNC)
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| _DefaultSyncExceptHandler_LowerA32:
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|   mov  x0, #EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS
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|   TO_HANDLER
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| 
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| VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A32_IRQ)
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| _DefaultIrq_LowerA32:
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|   mov  x0, #EXCEPT_AARCH64_IRQ
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|   TO_HANDLER
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| 
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| VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A32_FIQ)
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| _DefaultFiq_LowerA32:
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|   mov  x0, #EXCEPT_AARCH64_FIQ
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|   TO_HANDLER
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| 
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| VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A32_SERR)
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| _DefaultSError_LowerA32:
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|   mov  x0, #EXCEPT_AARCH64_SERROR
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|   TO_HANDLER
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| 
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| VECTOR_END(PeiVectorTable)
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