3fd8800954
implementation. Implement RISC-V CPU related functions in BaseCpuLib. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672 Signed-off-by: Abner Chang <abner.chang@hpe.com> Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Gilbert Chen <gilbert.chen@hpe.com>
70 lines
1.7 KiB
INI
70 lines
1.7 KiB
INI
## @file
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# Instance of CPU Library for various architecture.
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#
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# CPU Library implemented using ASM functions for IA32, X64, ARM, AARCH64,
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# PAL CALLs for IPF, and empty functions for EBC.
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#
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# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
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# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
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# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
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#
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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#
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##
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[Defines]
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INF_VERSION = 0x00010005
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BASE_NAME = BaseCpuLib
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MODULE_UNI_FILE = BaseCpuLib.uni
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FILE_GUID = 4FBD2538-249C-4b50-8F4A-A9E66609CBF6
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MODULE_TYPE = BASE
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VERSION_STRING = 1.0
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LIBRARY_CLASS = CpuLib
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#
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# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64
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#
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[Sources.IA32]
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Ia32/CpuSleep.c | MSFT
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Ia32/CpuFlushTlb.c | MSFT
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Ia32/CpuSleep.nasm| INTEL
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Ia32/CpuFlushTlb.nasm| INTEL
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Ia32/CpuSleepGcc.c | GCC
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Ia32/CpuFlushTlbGcc.c | GCC
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[Sources.X64]
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X64/CpuFlushTlb.nasm
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X64/CpuSleep.nasm
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[Sources.EBC]
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Ebc/CpuSleepFlushTlb.c
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[Sources.ARM]
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Arm/CpuFlushTlb.asm | RVCT
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Arm/CpuSleep.asm | RVCT
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Arm/CpuFlushTlb.asm | MSFT
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Arm/CpuSleep.asm | MSFT
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Arm/CpuFlushTlb.S | GCC
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Arm/CpuSleep.S | GCC
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[Sources.AARCH64]
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AArch64/CpuFlushTlb.S | GCC
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AArch64/CpuSleep.S | GCC
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AArch64/CpuFlushTlb.asm | MSFT
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AArch64/CpuSleep.asm | MSFT
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[Sources.RISCV64]
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RiscV/Cpu.S
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[Packages]
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MdePkg/MdePkg.dec
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