9344f09215
https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
46 lines
1.0 KiB
NASM
46 lines
1.0 KiB
NASM
;------------------------------------------------------------------------------
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;
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; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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; Module Name:
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;
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; FlushCacheLine.Asm
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;
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; Abstract:
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;
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; AsmFlushCacheLine function
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;
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; Notes:
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;
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;------------------------------------------------------------------------------
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SECTION .text
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;------------------------------------------------------------------------------
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; VOID *
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; EFIAPI
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; AsmFlushCacheLine (
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; IN VOID *LinearAddress
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; );
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;------------------------------------------------------------------------------
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global ASM_PFX(AsmFlushCacheLine)
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ASM_PFX(AsmFlushCacheLine):
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;
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; If the CPU does not support CLFLUSH instruction,
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; then promote flush range to flush entire cache.
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;
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mov eax, 1
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push ebx
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cpuid
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pop ebx
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mov eax, [esp + 4]
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test edx, BIT19
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jz .0
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clflush [eax]
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ret
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.0:
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wbinvd
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ret
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