d947fbed72
The new accelerated ARM and AARCH64 implementations take advantage of features that are only available when the MMU and Dcache are on. So restrict the use of this library to the DXE phase or later. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com>
170 lines
4.0 KiB
INI
170 lines
4.0 KiB
INI
## @file
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# Instance of Base Memory Library optimized for use in DXE phase.
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#
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# Base Memory Library that is optimized for use in DXE phase.
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# Uses REP, MMX, XMM registers as required for best performance.
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#
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# Copyright (c) 2007 - 2016, Intel Corporation. All rights reserved.<BR>
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php.
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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#
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##
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[Defines]
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INF_VERSION = 0x00010005
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BASE_NAME = BaseMemoryLibOptDxe
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MODULE_UNI_FILE = BaseMemoryLibOptDxe.uni
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FILE_GUID = 02BD55C2-AB1D-4b75-B0FD-9A63AE09B31D
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MODULE_TYPE = BASE
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VERSION_STRING = 1.0
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LIBRARY_CLASS = BaseMemoryLib
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#
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# VALID_ARCHITECTURES = IA32 X64 ARM AARCH64
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#
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[Sources]
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MemLibInternals.h
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[Sources.Ia32]
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Ia32/ScanMem64.nasm
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Ia32/ScanMem64.S
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Ia32/ScanMem32.nasm
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Ia32/ScanMem32.S
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Ia32/ScanMem16.nasm
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Ia32/ScanMem16.S
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Ia32/ScanMem8.nasm
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Ia32/ScanMem8.S
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Ia32/CompareMem.nasm
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Ia32/CompareMem.S
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Ia32/ZeroMem.nasm
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Ia32/ZeroMem.S
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Ia32/SetMem64.nasm
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Ia32/SetMem64.S
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Ia32/SetMem32.nasm
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Ia32/SetMem32.S
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Ia32/SetMem16.nasm
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Ia32/SetMem16.S
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Ia32/SetMem.nasm
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Ia32/SetMem.S
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Ia32/CopyMem.nasm
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Ia32/CopyMem.S
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Ia32/ScanMem64.nasm
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Ia32/ScanMem64.asm
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Ia32/ScanMem32.nasm
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Ia32/ScanMem32.asm
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Ia32/ScanMem16.nasm
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Ia32/ScanMem16.asm
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Ia32/ScanMem8.nasm
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Ia32/ScanMem8.asm
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Ia32/CompareMem.nasm
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Ia32/CompareMem.asm
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Ia32/ZeroMem.nasm
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Ia32/ZeroMem.asm
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Ia32/SetMem64.nasm
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Ia32/SetMem64.asm
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Ia32/SetMem32.nasm
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Ia32/SetMem32.asm
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Ia32/SetMem16.nasm
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Ia32/SetMem16.asm
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Ia32/SetMem.nasm
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Ia32/SetMem.asm
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Ia32/CopyMem.nasm
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Ia32/CopyMem.asm
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Ia32/IsZeroBuffer.nasm
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[Sources.X64]
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X64/ScanMem64.nasm
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X64/ScanMem64.asm
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X64/ScanMem64.S
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X64/ScanMem32.nasm
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X64/ScanMem32.asm
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X64/ScanMem32.S
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X64/ScanMem16.nasm
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X64/ScanMem16.asm
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X64/ScanMem16.S
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X64/ScanMem8.nasm
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X64/ScanMem8.asm
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X64/ScanMem8.S
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X64/CompareMem.nasm
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X64/CompareMem.asm
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X64/CompareMem.S
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X64/ZeroMem.nasm
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X64/ZeroMem.asm
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X64/ZeroMem.S
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X64/SetMem64.nasm
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X64/SetMem64.asm
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X64/SetMem64.S
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X64/SetMem32.nasm
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X64/SetMem32.asm
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X64/SetMem32.S
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X64/SetMem16.nasm
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X64/SetMem16.asm
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X64/SetMem16.S
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X64/SetMem.nasm
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X64/SetMem.asm
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X64/SetMem.S
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X64/CopyMem.nasm
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X64/CopyMem.asm
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X64/CopyMem.S
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X64/IsZeroBuffer.nasm
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[Defines.ARM, Defines.AARCH64]
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#
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# The ARM implementations of this library may perform unaligned accesses, and
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# may use DC ZVA instructions that are only allowed when the MMU and D-cache
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# are on. Since SEC, PEI_CORE and PEIM modules may execute with the MMU off,
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# omit them from the supported module types list for this library.
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#
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LIBRARY_CLASS = BaseMemoryLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER UEFI_DRIVER UEFI_APPLICATION
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[Sources.ARM]
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Arm/ScanMem.S |GCC
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Arm/SetMem.S |GCC
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Arm/CopyMem.S |GCC
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Arm/CompareMem.S |GCC
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Arm/ScanMem.asm |RVCT
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Arm/SetMem.asm |RVCT
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Arm/CopyMem.asm |RVCT
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Arm/CompareMem.asm |RVCT
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[Sources.AARCH64]
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AArch64/ScanMem.S
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AArch64/SetMem.S
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AArch64/CopyMem.S
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AArch64/CompareMem.S
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[Sources.ARM, Sources.AARCH64]
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Arm/ScanMemGeneric.c
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[Sources]
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ScanMem64Wrapper.c
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ScanMem32Wrapper.c
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ScanMem16Wrapper.c
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ScanMem8Wrapper.c
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ZeroMemWrapper.c
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CompareMemWrapper.c
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SetMem64Wrapper.c
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SetMem32Wrapper.c
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SetMem16Wrapper.c
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SetMemWrapper.c
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CopyMemWrapper.c
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IsZeroBufferWrapper.c
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MemLibGuid.c
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[Packages]
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MdePkg/MdePkg.dec
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[LibraryClasses]
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DebugLib
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BaseLib
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