01289ec36f
- Fix ARM Thumb mask operator. This was flagged by a toolchain as warning "use of logical '&&' with constant operand [-Wconstant-logical-operand]" - AArch64 should not be building the ARM32 disassemblers. - Add a AArch64 build target. The disassembler is still to be implemented. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Harry Liebel <Harry.Liebel@arm.com> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16069 6f19259b-4bc3-4df7-8a09-765794883524
49 lines
1.5 KiB
C
49 lines
1.5 KiB
C
/** @file
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Default exception handler
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Copyright (c) 2014, ARM Limited. All rights reserved.
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD
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License which accompanies this distribution. The full text of the license may
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be found at http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include <Base.h>
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#include <Library/BaseLib.h>
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#include <Library/PrintLib.h>
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#include <Library/ArmDisassemblerLib.h>
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/**
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Place a disassembly of of **OpCodePtr into buffer, and update OpCodePtr to
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point to next instruction.
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@param OpCodePtrPtr Pointer to pointer of instruction to disassemble.
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@param Thumb TRUE for Thumb(2), FALSE for ARM instruction stream
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@param Extended TRUE dump hex for instruction too.
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@param ItBlock Size of IT Block
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@param Buf Buffer to sprintf disassembly into.
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@param Size Size of Buf in bytes.
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**/
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VOID
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DisassembleInstruction (
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IN UINT8 **OpCodePtr,
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IN BOOLEAN Thumb,
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IN BOOLEAN Extended,
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IN OUT UINT32 *ItBlock,
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OUT CHAR8 *Buf,
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OUT UINTN Size
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)
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{
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// Not yet supported for AArch64.
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// Put error in the buffer as we have no return code and the buffer may be
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// printed directly so needs a '\0'.
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AsciiSPrint (Buf, Size, "AArch64 not supported");
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return;
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}
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